Application Note 1790
For 12V V
IN
, and V
OUT
more than 1.5V, the switching frequency
will need to be adjusted, as shown in Table 1; no frequency
adjustments are necessary for V
OUT
below 1.5V. For 5V V
IN
, the
frequency does not need to be adjusted and the module default
frequency can be used at any allowed V
OUT
. If the output voltage
is set to more than 1.8V, the output current will need to be
derated to allow for safe operation at elevated ambient
temperatures. Please refer to the derating curves in the
For V
IN
< 5.5V, please tie VIN directly to VCC for best efficiency.
Also, it is preferred that the EN/FF voltage be over 1.5V in order
to achieve better stability.
TABLE 1. RESISTANCE SETTING FOR DIFFERENT OUTPUT VOLTAGES
AND OPERATING FREQUENCY (R3 = 1k)
V
OUT
(V)
1.0
1.2
1.5
2.5
3.3
5.0
5.5
R
VSET
(Ω)
1500
Default
665
316
221
137
121
FREQUENCY
(kHz)
Default
Default
Default
650
800
950
950
R
FSET
(Ω)
(V
IN
= 12V)
Default
Default
Default
249k
124k
82.5k
82.5k
This evaluation board is designed for running 30A @ 1.2V at
room temperature without additional cooling systems needed.
However, if the output voltage is increased or the board is
operated at elevated temperatures, then the available current is
derated. Refer to the derated current curves in the
to
determine the output current available.
For layout of designs using the ISL8225M, the thermal
performance can be improved by adhering to the following
design tips:
1. Use the top and bottom layers to carry the large current.
VOUT1, VOUT2, Phase 1, Phase 2, PGND, VIN1 and VIN2
should have large, solid planes. Place enough thermal vias to
connect the power planes in different layers under and
around the module.
2. Phase 1 and Phase 2 pads are switching nodes that generate
switching noise. Keep these pads under the module. For
noise-sensitive applications, it is recommended to keep
phase pads only on the top and inner layers of the PCB; do not
place phase pads exposed to the outside on the bottom layer
of the PCB. To improve the thermal performance, the phase
pads can be extended in the inner layer, as shown in Phase 1
and Phase 2 pads on layer 3 (Figure 6) for this 30A evaluation
board. Make sure that layer 2 and layer 4 have the GND layers
to cover the extended areas of phase pads at layer 3 to avoid
noise coupling.
3. To avoid noise coupling, we recommend adding 470pF
capacitors on all COMP pins of each module for multiple
module operations.
4. If the ambient temperature is high or the board space is
limited, airflow is needed to dissipate more heat from the
modules. A heat sink can also be applied to the top side of the
module to further improve the thermal performance (heat
sink recommendation: Aavid Thermalloy, part number
375424B00034G,
Evaluation Board Information
The evaluation board size is 3 inch x 3 inch. It is a 4-layer board,
containing 2-ounce copper on the top and bottom layers and
1-ounce copper on all internal layers. The board can be used as a
30A reference design. Refer to the “Layout” section beginning on
components, including the solder attachment, are lead-free.
Thermal Considerations and Current Derating
For high current applications, board layout is very critical in order
to make the module operate safely and deliver maximum
allowable power. To carry large currents, the board layout needs
to be carefully designed to maximize thermal performance. To
achieve this, select enough trace width, copper weight and the
proper connectors.
2
AN1790.0
December 3, 2012
INTERSIL [ INTERSIL CORPORATION ]
