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5962R1420302VYC 参数 Datasheet PDF下载

5962R1420302VYC图片预览
型号: 5962R1420302VYC
PDF下载: 下载PDF文件 查看货源
内容描述: [Radiation and SEE Tolerant 3V to 13.2V, 9A Buck Regulator]
分类和应用:
文件页数/大小: 36 页 / 2124 K
品牌: INTERSIL [ Intersil ]
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ISL70003ASEH  
Pin Descriptions(Continued)  
PIN NUMBER  
PIN NAME ESD CIRCUIT  
DESCRIPTION  
50  
HS  
N/A  
1
On the R64.C package (heatsink option) this pin is electrically connected to the heatsink on the  
underside of the package. Connect this pin and/or the heatsink to a thermal plane.  
51  
52  
IMON  
IMON is a current source output that is proportional to the sensed current through the regulator. If not  
used it is recommended to tie IMON to VREFA. It is also acceptable to tie IMON to GND through a  
resistor.  
SGND  
1
7
This pin is connected to an internal metal trace that serves as a noise shield. Connect this pin to the  
PCB ground plane.  
25, 26, 34, 35,  
40, 41, 46, 47,  
55, 56  
PGNDx  
These pins are the power grounds associated with the corresponding internal power blocks. Connect  
these pins directly to the PCB ground plane. These pins should also connect to the negative terminals  
of the input and output capacitors. The package lid is internally connected to PGNDx.  
59  
60  
61  
62  
63  
64  
OCSETA  
OCSETB  
BUFIN+  
BUFIN-  
BUFOUT  
REF  
3
3
1
1
3
1
This pin is the redundant output overcurrent set input. Connect a resistor from this pin to the PCB  
ground plane to set the output overcurrent threshold.  
This pin is the primary output overcurrent set input. Connect a resistor from this pin to the PCB ground  
plane to set the output overcurrent threshold.  
This pin is the input to the internal unity gain buffer amplifier. For DDR memory power applications,  
connect the VTT voltage to this pin.  
This pin is the inverting input to the buffer amplifier. For DDR memory power applications, connect  
BUFOUT to this pin. Bypass this pin to the PCB ground plane with a 0.1µF ceramic capacitor.  
This pin is the output of the buffer amplifier. In DDR power applications, connect this pin to the  
reference input of the DDR memory. The buffer needs a minimum of 1.0µF load capacitor for stability.  
This pin is the output of the internal reference voltage. Bypass this pin to the PCB ground plane with a  
220nF ceramic capacitor located as close as possible to the IC. The bypass capacitor is needed to  
mitigate SEE.  
VREFA  
PIN #  
VREFD  
PIN #  
VDDA  
PIN #  
7V  
PIN #  
GNDD  
15V  
CLAMP  
7V  
CLAMP  
CLAMP  
GNDA  
GNDA  
GNDA  
GNDD  
CIRCUIT 2  
CIRCUIT 1  
CIRCUIT 3  
CIRCUIT 4  
CIRCUIT 5  
GNDA  
PGND  
VDDD  
PIN #  
PVINx  
15V  
CLAMP  
15V  
CLAMP  
15V  
CLAMP  
GNDA  
CIRCUIT 10  
GNDD  
PGNDx  
CIRCUIT 7  
GNDD  
GNDD  
CIRCUIT 6  
CIRCUIT 8  
CIRCUIT 9  
FN8746.0  
August 5, 2015  
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