ISL6227
Electrical Specifications
PARAMETER
PWM CONVERTERS
Load Regulation
VSEN Pin Bias Current
Minimum Duty Cycle
Maximum Duty Cycle
VOUT Pin Input Impedance
Undervoltage Shut-Down Level
Overvoltage Protection
GATE DRIVERS
Upper Drive Pull-Up Resistance
Upper Drive Pull-Down Resistance
Lower Drive Pull-Up Resistance
Lower Drive Pull-Down Resistance
R
2UGPUP
R
2UGPDN
R
2LGPUP
R
2LGPDN
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
V
CC
= 5V
-
-
-
-
4
2.3
4
1.1
8
4
8
3
Ω
Ω
Ω
Ω
I
VSEN
D
min
D
max
I
VOUT
V
UVL
V
OVP1
VOUT = 5V
Fraction of the set point; ~2μs noise filter
Fraction of the set point; ~2μs noise filter
0.0mA < I
VOUT1
< 5.0A; 5.0V < V
BATT
< 24.0V
By design
-2.0
-
-
-
-
70
110
-
80
4
87
134
75
115
+2.0
-
-
-
-
80
-
%
nA
%
%
kΩ
%
%
Recommended Operating Conditions, Unless Otherwise Noted.
(Continued)
SYMBOL
TEST CONDITIONS
MIN
TYP
MAX
UNITS
POWER GOOD AND CONTROL FUNCTIONS
Power Good Lower Threshold
Power Good Higher Threshold
PGOODx Leakage Current
PGOODx Voltage Low
ISEN Sourcing Current
OCSET Sourcing Current Range
EN - Low (Off)
EN - High (On)
Continuous-Conduction-Mode(CCM)
Enforced (HYS Operation Inhibited)
Automatic CCM/HYS Operation
Enabled
DDR - Low (Off)
DDR - High (On)
DDR REF Output Voltage
DDR REF Output Current
V
DDREF
I
DDREF
DDR = 1, I
REF
= 0...10mA
DDR = 1. Guaranteed by design.
VOUTX pulled low
VOUTX connected to the output
V
PG-
V
PG+
I
PGLKG
V
PGOOD
Fraction of the set point; ~3μs noise filter
Fraction of the set point; ~3μs noise filter.
V
PULLUP
= 5.5V
I
PGOOD
= -4mA
By design
84
110
-
-
-
2
-
2.0
-
0.9
-
3
0.99*
V
OC2
-
89
115
-
0.5
-
-
-
-
-
-
-
-
V
OC2
10
92
120
1
1
260
20
0.8
-
0.1
-
0.8
-
1.01*
V
OC2
12
%
%
μA
V
μA
μA
V
V
V
V
V
V
V
mΑ
4
FN9094.4
December 21, 2006
INTERSIL [ INTERSIL CORPORATION ]
