X9119
Instruction and Register Description
Device Addressing
WIPER COUNTER REGISTER (WCR)
The X9119 contains a Wiper Counter Registers (refer to
Table 4) for the XDCP potentiometer. The WCR is equivalent
to a serial-in, parallel-out register/counter with its outputs
decoded to select one of 1024 switches along its resistor
array. The contents of the WCR can be altered in one of
three ways:
1. it may be written directly by the host via the write wiper
counter register instruction (serial load)
2. it may be written indirectly by transferring the contents of
one of four associated data registers via the XFR data
register
3. it is loaded with the contents of its data register zero (R0)
upon power-up.
The Wiper Counter Register is a volatile register; that is, its
contents are lost when the X9119 is powered-down.
Although the register is automatically loaded with the value
in DR0 upon power-up, this may be different from the value
present at power-down. Power-up guidelines are
recommended to ensure proper loadings of the DR0 value
into the WCR.
DATA REGISTERS (DR0 TO DR3)
The potentiometer has four 10-bit non-volatile Data
Registers. These can be read or written directly by the host.
Data can also be transferred between any of the four Data
Registers and the Wiper Counter Register. All operations
changing data in one of the data registers is a nonvolatile
operation and will take a maximum of 10ms.
If the application does not require storage of multiple
settings for the potentiometer, the Data Registers can be
used as regular memory locations for system parameters or
user preference data.
Bit 9–Bit 0 are used to store one of the 1024 wiper position
(0 ~1023).
TABLE 4. WIPER CONTROL REGISTER, WCR (10-BIT), WCR9–WCR0:
Used to store the current wiper position (Volatile, V)
WCR9
V
(MSB)
TABLE 5. DATA REGISTER, DR (10-BIT), BIT 9–BIT 0:
Used to store wiper positions or data (Non-Volatile, NV)
Bit 9
NV
MSB
Bit 8
NV
Bit 7
NV
Bit 6
NV
Bit 5
NV
Bit 4
NV
Bit 3
NV
Bit 2
NV
Bit 1
NV
Bit 0
NV
LSB
WCR8
V
WCR7
V
WCR6
V
WCR5
V
WCR4
V
WCR3
V
WCR2
V
WCR1
V
WCR0
V
(LSB)
Four of the six instructions are four bytes in length. These
instructions are:
•
Read Wiper Counter Register
– read the current wiper
position of the selected potentiometer,
•
Write Wiper Counter Register
– change current wiper
position of the selected potentiometer,
•
Read Data Register
– read the contents of the selected
Data Register;
•
Write Data Register
– write a new value to the selected
Data Register.
The basic sequence of the four byte instructions is illustrated
in Figure 3. These four-byte instructions exchange data
between the WCR and one of the Data Registers. A transfer
from a data register to a WCR is essentially a write to a static
RAM, with the static RAM controlling the wiper position. The
response of the wiper to this action will be delayed by t
WRL
.
A transfer from the WCR (current wiper position), to a data
register is a write-to-nonvolatile memory and takes a
minimum of t
WR
to complete. The transfer can occur
between one of the four potentiometers and one of its
associated registers.
Two instructions (Figure 4) require a two-byte sequence to
complete. These instructions transfer data between the host
and the X9119; either between the host and one of the data
registers or directly between the host and the Wiper Counter
Register. These instructions are:
•
XFR Data Register to Wiper Counter Register
– This
transfers the contents of one specified Data Register to
the Wiper Counter Register.
•
XFR Wiper Counter Register to Data Register
– This
transfers the contents of the Wiper Counter Register to the
specified Data Register.
See “Instruction Format” on page 8 for more details.
POWER-UP AND DOWN REQUIREMENTS
There are no restrictions on the power-up condition of V
CC
and the voltages applied to the potentiometer pins provided
that the V
CC
is always more positive than or equal to the
voltages at R
H
, R
L
, and R
W
, i.e. V
CC
≥
R
H
, R
L
, R
W
. There
are no restrictions on the power-down condition. However,
the datasheet parameters for the DCP do not apply until 1ms
after V
CC
reaches its final value.
7
FN8162.4
July 9, 2008
INTERSIL [ INTERSIL CORPORATION ]
