LTC3642
PIN FUNCTIONS
SW (Pin 1):
Switch Node Connection to Inductor. This
pin connects to the drains of the internal power MOSFET
switches.
V
IN
(Pin 2):
Main Supply Pin. A ceramic bypass capacitor
should be tied between this pin and GND (Pin 8).
I
SET
(Pin 3):
Peak Current Set Input. A resistor from this
pin to ground sets the peak current trip threshold. Leave
floating for the maximum peak current (115mA). Short
this pin to ground for the minimum peak current (25mA).
A 1μA current is sourced out of this pin.
SS (Pin 4):
Soft-Start Control Input. A capacitor to ground
at this pin sets the ramp time to full current output dur-
ing start-up. A 5μA current is sourced out of this pin. If
left floating, the ramp time defaults to an internal 0.75ms
soft-start.
RUN (Pin 5):
Run Control Input. A voltage on this pin
above 1.2V enables normal operation. Forcing this pin
below 0.7V shuts down the LTC3642, reducing quiescent
current to approximately 3μA.
V
OUT
/V
FB
(Pin 6):
Output Voltage Feedback. For the fixed
output versions, connect this pin to the output supply. For
the adjustable version, an external resistive divider should
be used to divide the output voltage down for comparison
to the 0.8V reference.
HYST (Pin 7):
Run Hysteresis Open-Drain Logic Output.
This pin is pulled to ground when RUN (Pin 5) is below
1.2V. This pin can be used to adjust the RUN pin hysteresis.
See Applications Information.
GND (Pin 8):
Chip Ground.
Exposed Pad (Pin 9):
Ground. Must be soldered to PCB
ground for optimal electrical and thermal performance.
3642f
6
LINER [ LINEAR TECHNOLOGY ]
