FIGURE 2. LS7310-LS7313 BLOCK DIAGRAM
RUN
13
-
+
LEVEL 1
POWER
LEVEL
ROM
LEVEL 10
PULSE
12
-
+
OFF
11
-
+
DRIVER
CONTROL
LOGIC
PHASE
ANGLE
POINTER
DIGITAL
COMPARATOR
DRIVER
17
TRIG
PL1
18
-
+
DRIVER
PHASE-LOCKED
LOOP
AND
CLOCK
GENERATOR
PL10
9
V
DD
-
+
SYNC
15
V
DD
-
+
14
CAP
V
SS
V
SS
TABLE 1. TRIG PHASE ANGLES
(1)
FIGURE 3.
TRIG PHASE ANGLE Ø
PL INPUT
1
2
3
4
5
6
7
8
9
10
(1)
TRIG Ø
78°
86°
93°
100°
107°
112°
119°
127°
137°
149°
LOAD POWER %
(2
)
37
46
53
60
69
74
79
86
92
97
SYNC
Ø
TRIG
T
W
(2)
The TRIG Phase Angles shown in TABLE 1 are referenced to the
SYNC input. In the Application Schematic shown in Figure 4A,
SYNC is delayed by 7° from the AC line. Therefore, actual Phase
Angles with respect to the AC line are 7° less than TABLE 1 values.
TABLE 1 values are mask programmable.
The percentage of Full Power delivered to a resistive load by the
Triac Switch.
FIGURE 4 VALUE TABLE
CONDITION
(1), (3), (5)
(1), (3), (6)
(1), (4), (5)
(1), (4), (6)
(2), (3), (5)
(2), (3), (6)
(2), (4), (5)
(2), (4), (6)
C2(µF)
0.22
0.10
0.47
0.33
0.47
0.33
0.68
0.47
C5(µF)
100
100
220
220
220
220
220
220
FIGURE 4 NOTES
NOTE 1:
Value for 5mA LEDs
NOTE 2:
Use zener which produces 6.2V ±5% at 500µA or
less, i. e. P/N MZ4627
NOTE 3:
R6-C6 Snubber Network may be required for large
inductive loads.
NOTE 4:
Tie all unused touch inputs together and return to Vss
through 100k Ohm, 1/4W resistor.
(1)
33µs TRIG pulse (LS7310, LS7312)
(2)
1ms TRIG pulse (LS7311, LS7313)
(3) No LEDs
(4)
5mA LEDs
(5) 115VAC, C2 = 200V
(6)
220VAC, C2 = 400V
7310-011697-2
LSI [ LSI COMPUTER SYSTEMS ]
