Where, Rh and Ch are the resistor and the capacitor connected to the
THLD pin. If the pin is tied low, holding torque mode is disabled and
normal torque prevails in both dynamic and idle motor states.
DCYM, TDCYD, TDCYU
DCYM and TDCYD inputs control the PWM decay modes for the
LS8292 as follows:
DCYM
1
1
0
Table 2
TDCYD
Decay Mode
0
Fast
1
Slow
RdCd
Single-Mixed
PIN ASSIGNMENT
TOP VIEW
M0
M1
DCYM
RESET/
STEP/
24
1
24
24
23
22
21
20
19
VDD
INH1/
INH2/
PHA
PHB
PHC
PHD
TBLNK
TDCYD
SENSE1
SENSE2
AGND
2
3
4
5
6
7
8
9
10
11
12
DCYM, TDCYD and TDCYU inputs control the PWM decay modes for
the LS8293 as follows:
Table3
TDCYU
x
x
0
RuCu
FWD
EN/
HOME/
XTLO
XTLI
DGND
Vref
LS8292
18
17
16
15
14
13
DCYM
1
1
0
0
TDCYD
0
1
RdCd
RdCd
Decay Mode
Fast
Slow
Single-Mixed
Dual-Mixed
Fast-Decay.
Phase output are enabled while inhibit outputs are
chopped in both dynamic and idle motor states.
Slow-Decay.
Inhibit output are enabled while phase outputs are
chopped in both dynamic and idle motor states.
Single-Mixed-Decay.
Following a stepping event, if the step requires
the current in a winding to decrease, fast decay is applied to the winding
for a programmable duration followed by slow decay. The duration is
given by: Tdcyd = 1.2 x RdCd, where Rd and Cd are the resistor and the
capacitor connected to the TDCYD pin.
If the step requires the current in a winding to increase, slow decay is
applied to the winding. If motor is idle, slow decay is applied to both
windings.
Dual-Mixed-Deacy.
Following a stepping event fast decay is applied to
both windings for programmable durations followed by slow decay. The
duration of the fast decay for the winding requiring lower current
following a stepping event is given by: Tdcyd = 1.2 x RdCd and the
duration of the fast decay for the winding requiring higher current
following a stepping event is given by: Tdcyu = 1.2 x RuCu. Ru and Cu
are the resistor and the capacitor connected to the TDCYU pin.
If motor is idle, slow decay is applied to both windings.
VDD
Supply voltage positive terminal.
DGND
Supply negative terminal for digital ground.
AGND
Analog ground; must be connected together with DGND on the PCB.
M0
M1
DCYM
RESET/
STEP/
FWD
EN/
HOME/
XTLO
XTLI
DGND
SYNC/
TDCYU
THLD
1
24
28
24
VDD
INH1/
INH2/
PHA
PHB
PHC
PHD
2
24
27
24
3
24
26
24
4
24
25
24
5
6
24
24
23
24
24
24
7
24
LS8293
22
24
PHD
TBLNK
TDCYD
SENSE1
SENSE2
AGND
Vref
Vrefh
8
24
21
24
9
24
20
24
10
24
19
24
11
24
18
24
12
24
17
24
13
14
24
24
16
15
24
24
8292-021811-3
LSI [ LSI COMPUTER SYSTEMS ]
