®
LY61L5128
512K X 8 BIT HIGH SPEED CMOS SRAM
Rev. 2.4
Notes:
1. VIH(max) = VCC + 3.0V for pulse width less than 10ns.
2. VIL(min) = VSS - 3.0V for pulse width less than 10ns.
3. Over/Undershoot specifications are characterized, not 100% tested.
4. Typical values are included for reference only and are not guaranteed or tested.
℃
Typical valued are measured at VCC = VCC(TYP.) and TA = 25
5. 1mA for special request
6. 50 A for special request
µ
CAPACITANCE (TA = 25℃, f = 1.0MHz)
PARAMETER
Input Capacitance
Input/Output Capacitance
SYMBOL
MIN.
-
-
MAX
8
10
UNIT
pF
pF
CIN
CI/O
Note : These parameters are guaranteed by device characterization, but not production tested.
AC TEST CONDITIONS
Input Pulse Levels
0.2V to VCC - 0.2V
Input Rise and Fall Times
Input and Output Timing Reference Levels
Output Load
3ns
1.5V
CL = 30pF + 1TTL, IOH/IOL = -8mA/16mA
AC ELECTRICAL CHARACTERISTICS
(1) READ CYCLE
LY61L5128 LY61L5128 LY61L5128 LY61L5128 LY61L5128
-10 -12 -15 -20 -25
PARAMETER
SYM.
UNIT
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
Read Cycle Time
Address Access Time
Chip Enable Access Time
Output Enable Access Time
Chip Enable to Output in Low-Z
Output Enable to Output in Low-Z
Chip Disable to Output in High-Z
Output Disable to Output in High-Z
Output Hold from Address Change
tRC
tAA
tACE
tOE
tCLZ
tOLZ
tCHZ
tOHZ
tOH
10
-
-
-
10
10
5
-
-
5
5
-
12
-
-
-
12
12
6
-
-
6
6
-
15
-
-
-
15
15
7
-
-
7
7
-
20
-
-
-
20
20
8
-
-
8
8
-
25
-
-
-
25
25
9
-
-
9
9
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
-
-
-
-
-
*
*
*
*
2
0
-
-
3
3
0
-
-
3
4
0
-
-
3
4
0
-
-
3
4
0
-
-
3
(2) WRITE CYCLE
PARAMETER
LY61L5128 LY61L5128 LY61L5128 LY61L5128 LY61L5128
-10 -12 -15 -20 -25
MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX. MIN. MAX.
SYM.
UNIT
Write Cycle Time
tWC
tAW
tCW
tAS
tWP
tWR
tDW
tDH
10
8
8
0
8
0
6
0
2
-
-
-
-
-
-
-
-
-
-
12
10
10
0
9
0
7
0
3
-
-
-
-
-
-
-
-
-
-
15
12
12
0
10
0
8
0
4
-
-
-
-
-
-
-
-
-
-
20
16
16
0
11
0
9
0
5
-
-
-
-
-
-
-
-
-
-
25
20
20
0
12
0
10
0
6
-
-
-
-
-
-
-
-
-
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
Address Valid to End of Write
Chip Enable to End of Write
Address Set-up Time
Write Pulse Width
Write Recovery Time
Data to Write Time Overlap
Data Hold from End of Write Time
Output Active from End of Write
Write to Output in High-Z
tOW
tWHZ
*
*
6
7
8
9
-
10
*These parameters are guaranteed by device characterization, but not production tested.
Lyontek Inc. reserves the rights to change the specifications and products without notice.
5F, No. 2, Industry E. Rd. IX, Science-Based Industrial Park, Hsinchu 300, Taiwan.
TEL: 886-3-6668838
FAX: 886-3-6668836
5
LYONTEK [ Lyontek Inc. ]
