Monolithic CMOS Analog Multiplexers
DG508A/DG509A
LOGIC INPUT
t
r
< 20ns
t
f
< 20ns
3V
50%
0
V
S1
DG508A
DG509A
ALL S
AND DA
+5V
+2.4V
+15V
EN
SWITCH
OUTPUT
V
D
(SEE FIG. 1)
TRANSITION
TIME
SWITCH
OUTPUT
V
D
0.8V
S1
0
LOGIC
INPUT
A0, A1, (A2)
GND
50Ω
0.8V
S8
V
S8
t
transition
S
1
ON
t
ON
(EN)
S
8
ON
t
transition
t
OFF
(EN)
DB, D
V-
1kΩ
-15V
35pF
Figure 3. Break-Before-Make Test Circuit
0
SWITCH
0.1V
0
OUTPUT
V
D
(SEE FIG. 2)
TENABLE t
(ON)
t
(OFF)
TIME
0.9V
0
V
0
V
S
SWITCH
OUTPUT
V
D
(SEE FIG. 3)
OPEN TIME
(B.B.M INTERVAL)
V
S
50%
0V
t
open
Figure 4. Timing Diagram for Figures 1, 2, and 3
Table 1a. DG508A Truth Table
A2
X
0
0
0
0
1
1
1
1
A1
X
0
0
1
1
0
0
1
1
A0
X
0
1
0
1
0
1
0
1
EN
0
1
1
1
1
1
1
1
1
ON SWITCH
NONE
1
2
3
4
5
6
7
8
Table 1 b. DG509A Truth Table
A1
X
0
0
1
1
A0
X
0
1
0
1
EN
0
1
1
1
1
ON SWITCH
NONE
1
2
3
4
X = Don’t care.
X = Don’t care.
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7
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
