DS80C320/DS80C323 High-Speed/Low-Power Microcontrollers
Figure 1. Block Diagram
DS80C320/
DS80C323
PIN DESCRIPTION
PIN
DIP
40
20
PLCC
44
22, 23
TQFP
38
16, 17
NAME
V
CC
GND
+5V (+3V for DS80C323)
Digital Circuit Ground
FUNCTION
9
10
4
RST
Reset Input.
The RST input pin contains a Schmitt voltage input to
recognize external active-high reset inputs. The pin also employs an
internal pulldown resistor to allow for a combination of wired OR
external reset sources. An RC is
not
required for power-up, as the device
provides this function internally.
Crystal Oscillator Pins.
XTAL1 and XTAL2 provide support for
parallel-resonant, AT-cut crystals. XTAL1 acts also as an input in the
event that an external clock source is used in place of a crystal. XTAL2
serves as the output of the crystal amplifier.
Program Store-Enable Output, Active Low.
This signal is commonly
connected to external ROM memory as a chip enable.
PSEN
provides an
active-low pulse width of 2.25 XTAL1 cycles with a period of four
XTAL1 cycles.
PSEN
is driven high when data memory (RAM) is being
accessed through the bus and during a reset condition.
18
19
20
21
14
15
XTAL2
XTAL1
29
32
26
PSEN
3 of 40