8-Bit CODECs
LSB of the control word. Successive conversions are
initiated after the last bit of the previous conversion
result has been clocked out. Resultant data is only
available after conversion is complete.
The time required for the T/H to acquire an input signal
is a function of how quickly its input capacitance is
charged. If the input signal’s source impedance is high,
the acquisition time lengthens, and more time must be
allowed between conversions. This time, t
ACQ2
, is cal-
culated by the following equation:
t
ACQ2
= (6.2
✕
R
S
✕
15pF) + t
ACQ
where R
S
= the source impedance of the input signal;
t
ACQ
is the T/H acquisition time from the
Electrical
Characteristics
table.
Conversion Progress
The comparator’s negative input is connected to the
auto-zero rail. Since the device requires only a single
supply, the ZERO node at the input of the comparator
equals V
DD
/2. The capacitive DAC restores node ZERO
to have no voltage difference at the comparator inputs
within the limits of an 8-bit resolution.
Input Voltage Range
Internal protection diodes that clamp the analog input
to V
DD
and GND allow AIN to swing from (GND - 0.3V)
to (V
DD
+ 0.3V) without damaging the device.
However, for accurate conversions, the input must not
exceed (V
DD
+ 0.05V) or be less than (GND - 0.05V).
The valid input range for the analog input is from GND
to V
REF
. The output code is invalid (code zero) when a
negative input voltage is applied, and full scale (FS)
when the input voltage exceeds the reference.
Input Bandwidth
The ADC’s input tracking circuitry has a 2.5MHz full-
power bandwidth, so it is possible to digitize high-
speed transient events and measure periodic signals
with bandwidths exceeding the ADC’s sampling rate by
using undersampling techniques. To avoid high-fre-
quency signals being aliased into the frequency band
of interest, low-pass filters such as the MAX7418–
MAX7426 are recommended.
MAX1102/MAX1103/MAX1104
V
REF
GND
MAX1102
MAX1103
MAX1104
HOLD
AIN
TRACK
5pF
15pF
ZERO
CAPACITIVE
DAC
HOLD
TRACK
Digital-to-Analog Converter
The MAX1102/MAX1103/MAX1104 DAC section uses
an R-2R ladder network that converts the 8-bit digital
input into an equivalent analog output voltage propor-
tional to the applied reference voltage (Figure 3). The
DAC features a double-buffered input, and a buffered
analog output.
V
DD
/2
Figure 2. Equivalent Input Circuit
R
R
R
R
R
R
R
2R
2R
2R
2R
2R
2R
2R
2R
2R
REF
GND
LSB
DAC_ REGISTER
NOTE: SWITCH POSITIONS SHOWN FOR DAC CODE FFhex.
MSB
OUT
Figure 3. DAC Simplified Circuit Diagram
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9
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
