12-Bit, 30Msps, TTL-Output ADC
MAX1172
CLK
(TTL)
V
IN
(±2V)
+5V
+
C19
1µF
4
2
VIN
VOUT 6
R1
100Ω
17 CLK
24 VIN
+2.5V
+
5
1µF
10k
30k
C2
0.01µF
23 VRT3
C3
0.01µF
25 VRT2
C4
0.01µF
1
10k
8
3
2
26 VRT1
-5.2V
4
C17
0.01µF
6
C16
1µF
DGND
AGND
30k
C6
0.01µF
-2.5V
C7
0.01µF
28 VFB
C5
0.01µF
27 VSB
C1
0.01µF
21 VFT
MAX1172
COARSE
ADC
4
D12 14 (OVERRANGE)
D11 13
D10 12
(MSB)
IC1
(REF-03)
GND
TRIM
R
22 VST
2R
ANALOG
PRESCALER
D9 11
D8 10
DECODING NETWORK
DIGITAL OUTPUTS
(LSB)
D7 9
D6 8
D5 7
D4 6
D3 5
D2 4
D1 3
R
SUCCESSIVE
INTERPOLATION
STAGE N
DGND
32
C13
0.01µF
DGND
1
15
FB
D1
C15 C14
10µF 10µF
FB
FB
D0 2
2R
SUCCESSIVE
INTERPOLATION
STAGE 1
2R
IC2
OP-07
7
2R
+5V
C18
0.01µF
AGND
AGND
DV
CC
29
18
31
19
30
20
16
DV
CC
V
CC
V
CC
V
EE
V
EE
C8 C10
0.1µF 0.1µF
C12
0.01µF
C9 C11
0.1µF 0.1µF
NOTES:
1) D1 = SCHOTTKY OR HOT CARRIER DIODE
2) FB = FERRITE BEAD, FAIR RIGHT P/N 2743001111, TO BE MOUNTED AS
CLOSELY AS POSSIBLE. THE FERRITE BEAD TO ADC CONNECTION SHOULD
NOT BE SHARED WITH ANY OTHER DEVICE.
3) C1–C3 = CHIP CAPACITOR (RECOMMENDED) MOUNTED AS CLOSELY TO
THE DEVICE’S PIN AS POSSIBLE
4) USE OF A SEPARATE SUPPLY FOR V
CC
AND DV
CC
IS NOT RECOMMENDED
5) R1 PROVIDES CURRENT LIMITING TO 45mA
-5.2V
(ANALOG)
+5V
(ANALOG)
Figure 2. Typical Interface Circuit
8
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MAXIM [ MAXIM INTEGRATED PRODUCTS ]
