±15kV ESD-Protected, Quad, Low-Power
RS-232 Line Driver
MAX1488E
R
C
1M
CHARGE-CURRENT
LIMIT RESISTOR
HIGH-
VOLTAGE
DC
SOURCE
R
D
1500Ω
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
HIGH-
VOLTAGE
DC
SOURCE
R
C
50M to 100M
CHARGE-CURRENT
LIMIT RESISTOR
R
D
330Ω
DISCHARGE
RESISTANCE
DEVICE
UNDER
TEST
Cs
100pF
STORAGE
CAPACITOR
Cs
150pF
STORAGE
CAPACITOR
Figure 2a. Human Body ESD Test Model
Figure 3a. IEC1000-4-2 ESD Test Model
I
P
100%
90%
AMPERES
36.8%
10%
0
0
t
RL
TIME
Ir
PEAK-TO-PEAK RINGING
(NOT DRAWN TO SCALE)
I
PEAK
I
100%
90%
10%
t
DL
CURRENT WAVEFORM
t
r
= 0.7ns to 1ns
30ns
60ns
t
Figure 2b. Human Body Model Current Waveform
Figure 3b. IEC1000-4-2 ESD Generator Current Waveform
IEC1000-4-2
The IEC1000-4-2 standard covers ESD testing and per-
formance of finished equipment; it does not specifically
refer to integrated circuits. The MAX1488E helps you
design equipment that meets Level 4 (the highest level)
of IEC1000-4-2, without additional ESD-protection com-
ponents.
The major difference between tests done using the
Human Body Model and IEC1000-4-2 is higher peak
current in IEC1000-4-2. Because series resistance is
lower in the IEC1000-4-2 ESD test model (Figure 3a),
the ESD withstand voltage measured to this standard is
generally lower than that measured using the Human
Body Model. Figure 3b shows the current waveform for
the ±6kV IEC1000-4-2 Level 4 ESD Contact-Discharge
test.
The Air-Gap test involves approaching the device with
a charged probe. The Contact-Discharge method con-
nects the probe to the device before the probe is ener-
gized.
Machine Model
The Machine Model for ESD testing uses a 200pF stor-
age capacitor and zero-discharge resistance. Its objec-
tive is to mimic the stress caused by contact that
occurs with handling and assembly during manufactur-
ing. Of course, all pins (not just RS-232 inputs and out-
puts) require this protection during manufacturing.
Therefore, the Machine Model is less relevant to the I/O
ports than the Human Body Model and IEC1000-4-2.
__________Applications Information
Use proper layout to ensure other devices on your
board are not damaged in an ESD strike. Currents as
high as 60A can instantaneously pass into the ground,
so it is important to minimize the ground-lead return
path to the power supply. A separate return path to the
power supply is recommended. Trace widths should be
greater than 40 mils. V
CC
and V
EE
must be bypassed
with 0.1µF capacitors as close to the part as possible to
ensure maximum ESD protection.
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