Low-Power, Slew-Rate-Limited
RS-485/RS-422 Transceivers
______________________________________________________________Pin Description
PIN
MAX481/MAX483/
MAX485/MAX487/
MAX1487
DIP/SO
1
2
µMAX
3
4
MAX488/
MAX490
DIP/SO
2
—
µMAX
4
—
MAX489/
MAX491
DIP/SO
2
3
RO
RE
Receiver Output: If A > B by 200mV, RO will be high;
If A < B by 200mV, RO will be low.
Receiver Output Enable. RO is enabled when
RE
is low; RO is
high impedance when
RE
is high.
Driver Output Enable. The driver outputs, Y and Z, are enabled
by bringing DE high. They are high impedance when DE is low. If
the driver outputs are enabled, the parts function as line drivers.
While they are high impedance, they function as line receivers if
RE
is low.
Driver Input. A low on DI forces output Y low and output Z high.
Similarly, a high on DI forces output Y high and output Z low.
Ground
Noninverting Driver Output
Inverting Driver Output
Noninverting Receiver Input and Noninverting Driver Output
Noninverting Receiver Input
Inverting Receiver Input and Inverting Driver Output
Inverting Receiver Input
Positive Supply: 4.75V
≤
V
CC
≤
5.25V
No Connect—not internally connected
NAME
NAME
FUNCTION
FUNCTION
MAX481/MAX483/MAX485/MAX487–MAX491/MAX1487
3
5
—
—
4
DE
4
5
—
—
6
—
7
—
8
—
TOP VIEW
6
7
—
—
8
—
1
—
2
—
3
4
5
6
—
8
—
7
1
—
5
6
7
8
—
2
—
1
3
—
5
6, 7
9
10
—
12
—
11
14
1, 8, 13
DI
GND
Y
Z
A
A
B
B
V
CC
N.C.
RO
1
R
8
7
6
V
CC
B
A
GND
RO
1
R
8
V
CC
7
B
Rt
6
A
5
GND
RE
2
DE
3
DI
4
D
MAX481
MAX483
MAX485
MAX487
MAX1487
B
Rt
A
R
DE
D
DI
5
DIP/SO
B
V
CC
RO
1
2
3
8
A
GND
DI
DE
RE
2
DE
3
DI
4
D
RO
RE
4
MAX481
MAX483
MAX485
MAX487
MAX1487
µMAX
7
6
5
RE
NOTE: PIN LABELS Y AND Z ON TIMING, TEST, AND WAVEFORM DIAGRAMS REFER TO PINS A AND B WHEN DE IS HIGH.
TYPICAL OPERATING CIRCUIT SHOWN WITH DIP/SO PACKAGE.
Figure 1. MAX481/MAX483/MAX485/MAX487/MAX1487 Pin Configuration and Typical Operating Circuit
_______________________________________________________________________________________
7
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
