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MAX5151ACPE 参数 Datasheet PDF下载

MAX5151ACPE图片预览
型号: MAX5151ACPE
PDF下载: 下载PDF文件 查看货源
内容描述: 低功耗,双通道, 13位电压输出DAC,串行接口 [Low-Power, Dual, 13-Bit Voltage-Output DACs with Serial Interface]
分类和应用: 转换器数模转换器光电二极管
文件页数/大小: 16 页 / 190 K
品牌: MAXIM [ MAXIM INTEGRATED PRODUCTS ]
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Low-Power, Dual, 13-Bit Voltage-Output DACs
with Serial Interface
+5V
The address and control bits determine the MAX5150/
MAX5151's response, as outlined in Table 1.
The MAX5150/MAX5151's digital inputs are double
buffered, which allows any of the following: loading the
input register(s) without updating the DAC register(s),
updating the DAC register(s) from the input register(s),
or updating the input and DAC registers concurrently.
The address and control bits allow the DACs to act
independently.
The 16-bit data can be sent as two 8-bit packets (SPI,
Microwire), with
CS
low during this period. The address
and control bits determine which register will be updat-
ed, and the state of the registers when exiting shut-
down. The 3-bit address/control determines the
following:
• registers to be updated
• clock edge on which data is to be clocked out via
the serial-data output (DOUT)
• state of the user-programmable logic output
• configuration of the device after shutdown.
The general timing diagram of Figure 5 illustrates how
data is acquired. Driving
CS
low enables the device to
receive data. Otherwise, the interface control circuitry is
disabled. With
CS
low, data at DIN is clocked into the
register on the rising edge of SCLK. As
CS
goes high,
data is latched into the input and/or DAC registers
depending on the address and control bits. The maxi-
mum clock frequency guaranteed for proper operation
is 10MHz. Figure 6 depicts a more detailed timing dia-
gram of the serial interface.
MAX5150/MAX5151
SS
DIN
MOSI
SPI/QSPI
PORT
MAX5150
MAX5151
SCLK
SCK
CS
I/O
CPOL = 0, CPHA = 0
Figure 3. Connections for SPI/QSPI
MSB ..................................................................................LSB
16 Bits of Serial Data
Address Bits
A0
Control Bits
C1, C0
MSB.......Data Bits.........LSB
D12.................................D0
13 Data Bits
1 Address/2 Control Bits
Figure 4. Serial-Data Format
CS
COMMAND
EXECUTED
1
DIN
A0
C1
C0 D12 D11 D10
D9
8
D8
D7
9
D6
D5
D4
D3
D2
D1
16
D0
SCLK
Figure 5. Serial-Interface Timing Diagram
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