Low-Power, Dual, 10-Bit, Voltage-Output DACs
with Serial Interface
ELECTRICAL CHARACTERISTICS—MAX5158 (continued)
(V
DD
= +5V ±10%, V
REFA
= V
REFB
= 2.048V, R
L
= 10kΩ, C
L
= 100pF, T
A
= T
MIN
to T
MAX
, unless otherwise noted. Typical values are
at T
A
= +25°C (OS_ tied to AGND for a gain of +2V/V).)
PARAMETER
DIGITAL OUTPUTS (DOUT, UPO)
Output High Voltage
Output Low Voltage
DYNAMIC PERFORMANCE
Voltage Output Slew Rate
Output Settling Time
Output Voltage Swing
OSA or OSB Input Resistance
Time Required to Exit Shutdown
Digital Feedthrough
Digital Crosstalk
POWER SUPPLIES
Positive Supply Voltage
Power-Supply Current
Power-Supply Current
in Shutdown
Reference Current in Shutdown
TIMING CHARACTERISTICS
SCLK Clock Period
SCLK Pulse Width High
SCLK Pulse Width Low
CS
Fall to SCLK Rise Setup Time
SCLK Rise to
CS
Rise Hold Time
SDI Setup Time
SDI Hold Time
SCLK Rise to DOUT
Valid Propagation Delay
SCLK Fall to DOUT
Valid Propagation Delay
SCLK Rise to
CS
Fall Delay
CS
Rise to SCLK Rise Hold
CS
Pulse Width High
t
CP
t
CH
t
CL
t
CSS
t
CSH
t
DS
t
DH
t
DO1
t
DO2
t
CS0
t
CS1
t
CSW
C
LOAD
= 200pF
C
LOAD
= 200pF
10
40
100
(Note 4)
100
40
40
40
0
40
0
80
80
V
DD
I
DD
(Note 3)
4.5
0.5
2
0
CS
= V
DD
, f
DIN
= 100kHz, V
SCLK
= 5Vp-p
R
OS_
SYMBOL
V
OH
V
OL
SR
To 1/2LSB of full-scale, V
STEP
= 4V
Rail-to-rail (Note 2)
24
CONDITIONS
I
SOURCE
= 2mA
I
SINK
= 2mA
MIN
V
DD
- 0.5
0.13
0.75
8
0 to V
DD
34
25
5
5
5.5
0.65
10
±1
0.4
TYP
MAX
UNITS
V
V
V/µs
µs
V
kΩ
µs
nV-s
nV-s
V
mA
µA
µA
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
MAX5158/MAX5159
I
DD(SHDN)
(Note 3)
Note 1:
Accuracy is specified from code 2 to code 1023.
Note 2:
Accuracy is better than 1LSB for V
OUT
_ greater than 6mV and less than V
DD
- 50mV. Guaranteed by PSRR test at the
end points.
Note 3:
Digital inputs are set to either V
DD
or DGND, code = 0000 hex, R
L
=
∞.
Note 4:
SCLK minimum clock period includes rise and fall times.
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3
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
