SOT23, Low-Power µP Supervisory Circuits
with Battery Backup and Chip-Enable Gating
Pin Description
PIN
NAME
FUNCTION
Active-High Reset Output. RESET asserts high continuously when V
CC
is below the reset threshold (V
TH
),
MR
is low, or RESET IN is low. It asserts in pulses when the internal watchdog times out. RESET remains
asserted for the reset timeout period (t
RP
) after V
CC
rises above the reset threshold, after the manual reset
input goes from low to high, after RESET IN goes high, or after the watchdog triggers a reset event.
RESET is an open-drain active-high reset output.
Active-Low Reset Output.
RESET
asserts low continuously when V
C C
is below the reset threshold
(V
TH
), the manual reset input is low, or RESET IN is low. It asserts low in pulses when the internal
watchdog times out.
RESET
remains asserted low for the reset timeout period (t
RP
) after V
C C
rises above the reset threshold, after the manual reset input goes from low to high, after RESET
IN goes high, or after the watchdog triggers a reset event. The MAX636_L is an active-low push-
pull output, while the MAX636_P is an active-low open-drain output.
Chip-Enable Input. The input to chip-enable gating circuitry. Connect to GND or OUT if not used.
Ground
MAX6365
Manual-Reset Input. Maintaining logic low on
MR
asserts a reset. Reset output
remains asserted as long as
MR
is low and for the reset timeout period (t
RP
) after
MR
transitions
from low to high. Leave unconnected, or connect to V
CC
if not used.
MR
has an internal 20kΩ
pullup to V
CC
.
MAX6366
Watchdog Input. If WDI remains high or low for longer than the watchdog timeout
period (t
WD
), the internal watchdog timer runs out and a reset pulse is triggered for the reset
timeout period (t
RP
). The internal watchdog clears whenever reset asserts or whenever WDI sees
a rising or falling edge (Figure 2).
MAX6367
Battery-On Output. BATT ON goes high when in battery backup mode.
MAX6368
Reset Input. When RESET IN falls below 1.235V, reset asserts. Reset output remains
asserted as long as RESET IN is low and for at least t
RP
after RESET IN goes high.
Supply Voltage, 1.2V to 5.5V. Reset asserts when V
C C
drops below the reset threshold voltage
(V
TH
). Reset remains asserted until V
C C
rises above V
TH
and for at least t
RP
after V
C C
rises
above V
TH
.
Output. OUT sources from V
C C
when not in reset and from the greater of V
CC
or BATT when V
C C
is below the reset threshold.
Backup-Battery Input. When V
C C
falls below the reset threshold, OUT switches to BATT if V
BATT
is 20mV greater than V
C C
. When V
C C
rises 20mV above V
BATT
, OUT switches to V
C C
. The 40mV
hysteresis prevents repeated switching if V
CC
falls slowly.
Chip-Enable Output.
CE
OUT goes low only when
CE
IN is low and reset is not asserted. If
CE
IN is low when reset is asserted,
CE
OUT will stay low for 12µs (typ) or until
CE
IN goes high,
whichever occurs first.
MAX6365–MAX6368
RESET
1
RESET
2
3
CE
IN
GND
MR
4
WDI
BATT ON
RESET IN
5
V
CC
6
OUT
7
BATT
8
CE
OUT
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7
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
