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MAX985EBT PDF Datasheet浏览和下载

型号:
MAX985EBT
PDF下载:
下载PDF文件
内容描述:
微功耗,低电压, SOT23封装,轨到轨输入/输出比较器
[Micropower, Low-Voltage, SOT23, Rail-to-Rail I/O Comparators]
文件大小:
453 K
文件页数:
13 Pages
品牌Logo:
品牌名称:
MAXIM [ MAXIM INTEGRATED PRODUCTS ]
供应:
MAX985EBT货源
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Micropower, Low-Voltage, UCSP/SC70,
Rail-to-Rail I/O Comparators
Zero-Crossing Detector
Figure 3 shows a zero-crossing detector application.
The MAX985’s inverting input is connected to ground,
and its noninverting input is connected to a 100mV
P-P
signal source. As the signal at the noninverting input
crosses 0V, the comparator’s output changes state.
UCSP Reliability
The chip-scale package (UCSP) represents a unique
packaging form factor that may not perform equally to a
packaged product through traditional mechanical relia-
bility tests. UCSP reliability is integrally linked to the
user’s assembly methods, circuit board material, and
usage environment. The user should closely review
these areas when considering use of a UCSP package.
Performance through Operating Life Test and Moisture
Resistance remains uncompromised as it is primarily
determined by the wafer-fabrication process.
Mechanical stress performance is a greater consideration
for a UCSP package. UCSPs are attached through direct
solder contact to the user’s PC board, foregoing the
inherent stress relief of a packaged product lead frame.
Solder joint contact integrity must be considered.
Information on Maxim’s qualification plan, test data, and
recommendations are detailed in the UCSP application
note, which can be found on Maxim’s website at
www.maxim-ic.com.
MAX985/MAX986/MAX989/MAX990/MAX993/MAX994
Logic-Level Translator
Figure 4 shows an application that converts 5V logic lev-
els to 3V logic levels. The MAX986 is powered by the 5V
supply voltage, and the pullup resistor for the MAX986’s
open-drain output is connected to the 3V supply voltage.
This configuration allows the full 5V logic swing without
creating overvoltage on the 3V logic inputs. For 3V to 5V
logic-level translation, simply connect the 3V supply to
V
CC
and the 5V supply to the pullup resistor.
UCSP Package Consideration
For general UCSP package information and PC layout
considerations, please refer to Maxim Application
Note,“Wafer-Level
Chip-Scale Package.”
5V (3V)
V
CC
3V (5V)
2
100mV
4 IN+
OUT 1
3 IN-
100kΩ
3
IN+
V
CC
4
IN-
OUT
1
3V (5V)
LOGIC OUT
2
100kΩ
V
CC
R
PULLUP
MAX985
V
EE
5
5V (3V) LOGIC IN
V
EE
5
MAX986
Figure 3. Zero-Crossing Detector
Figure 4. Logic-Level Translator
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