4 Megabit (512K x 8-Bit) SRAM
T
ABLE
5. 32408B F
UNCTIONAL
D
ESCRIPTION 1
CS
H
L
L
L
1. X = don’t care.
WE
X
H
H
L
OE
X
H
L
X
M
ODE
Not Select
Output Disable
Read
Write
I/O P
IN
High-Z
High-Z
D
OUT
D
IN
32C408B
S
UPPLY
C
URRENT
I
SB
, I
SB1
I
CC
I
CC
I
CC
T
ABLE
6. 32C408B AC C
HARACTERISTICS FOR
W
RITE
C
YCLE
(V
CC
=5V +/- 10%, T
A
= -55
TO
+1‘25C, U
NLESS
O
TERWISE
S
PECIFIED
P
ARAMETER
Write Cycle Time
-20
-25
-30
Chip Select to End of Write
-20
-25
-30
Address Setup Time
-20
-25
-30
Address Valid to End of Write
-20
-25
-30
Write Pulse Width (OE High)
-20
-25
-30
Write Recovery Time
-20
-25
-30
Write to Output in High-Z
-20
-25
-30
S
YMBOL
t
WC
S
UBGROUPS
9, 10, 11
20
25
30
t
CW
9, 10, 11
14
15
17
t
AS
9, 10, 11
0
0
0
t
AW
9, 10, 11
14
15
17
t
WP
9, 10, 11
14
15
17
t
WR
9, 10, 11
0
0
0
t
WHZ
9, 10, 11
--
--
--
5
5
6
--
--
--
--
--
--
--
--
--
ns
--
--
--
--
--
--
ns
--
--
--
--
--
--
ns
--
--
--
--
--
--
ns
--
--
--
--
--
--
ns
--
--
--
--
--
--
ns
M
IN
T
YP
M
AX
U
NIT
ns
Memory
05.02.02 Rev 7
All data sheets are subject to change without notice
4
©2002 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
