4 Megabit (512K x 8-Bit) SRAM
T
ABLE
4. 32C408B AC C
HARACTERISTICS FOR
R
EAD
C
YCLE
(V
CC
=5V +/- 10%, T
A
= -55
TO
+1‘25C, U
NLESS
O
TERWISE
S
PECIFIED
P
ARAMETER
Read Cycle Time
-20
-25
-30
Address Access Time
-20
-25
-30
Chip Select Access Time
-20
-25
-30
Output Enable to Output Valid
-20
-25
-30
Chip Select to Output in Low-Z
-20
-25
-30
Output Enable to Output in Low-Z
-20
-25
-30
Chip Deselect to Output in High-Z
-20
-25
-30
Output Disable to Output in High-Z
-20
-25
-30
Output Hold from Address Change
-20
-25
-30
Chip Select to Power Up Time
-20
-25
-30
Chip Select to Power Down Time
-20
-25
-30
S
YMBOL
t
RC
S
UBGROUPS
9, 10, 11
20
25
30
t
AA
9, 10, 11
--
--
--
t
CO
9, 10, 11
--
--
--
t
OE
9, 10, 11
--
--
--
t
LZ
9, 10, 11
--
--
--
t
OLZ
9, 10, 11
--
--
--
t
HZ
9, 10, 11
--
--
--
t
OHZ
9, 10, 11
--
--
--
t
OH
9, 10, 11
3
5
5
t
PU
9, 10, 11
--
--
--
t
PD
9, 10, 11
--
--
--
10
15
20
0
0
0
--
--
--
5
6
8
5
6
8
0
0
0
3
3
3
--
--
--
--
--
--
--
--
--
--
--
--
M
IN
T
YP
32C408B
M
AX
--
--
--
ns
20
25
30
ns
20
25
30
10
12
14
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
--
--
--
ns
U
NIT
ns
Memory
ns
05.02.02 Rev 7
All data sheets are subject to change without notice
3
©2002 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
