256Mb (8-Meg X 8-Bit X 4-Banks) SDRAM
48SD3208
TABLE 4. DC ELECTRICAL CHARACTERISTICS
(V = 3.3V + 0.3V, V Q = 3.3V + 0.3V, T = -55 TO 125°C, UNLESS OTHERWISE SPECIFIED)
CC
CC
A
PARAMETER
SYMBOL
TEST CONDITIONS
SUBGROUPS
MIN
MAX
UNITS
Standby Current in Power Down
( input signal stable)5
ICC2PS
CKE = V
tCK = 0
1, 2, 3
2
mA
IL
Standby Current in non power down6
ICC2N
ICC2NS
ICC3P
CKE, CS = V
tCK = 12 ns
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
20
9
mA
mA
mA
mA
mA
mA
mA
IH
Standby Current in non power down
( Input signal stable)7
CKE = V
IH
tCK = 0
Active standby current in
power down1, 2, 4
CKE = V
4
IL
tCK = 12 ns
Active standby current in power down
(input signal stable)2, 5
ICC3PS
ICC3N
ICC3NS
ICC4
CKE = V
3
IL
tCK = 0
Active standby power in
non power down1,2, 6
CKE, CS = V
30
15
IH
tCK = 12 ns
Active standby current in non power
down ( input signal stable)2,7
Burst Operating Current11,2,8
CAS Latency = 2
CKE = V
IH
tCK = 0
tCK = min
BL = 4
110
145
CAS Latency = 3
Refresh Current3
Self Refresh current9
ICC5
ICC6
tRC = min
1, 2, 3
1, 2, 3
220
3
mA
mA
V >V - 0.2V
IH CC
V < 0.2 V
IL
Input Leakage Current
Output Leakage Current
Output high voltage
Output low voltage
ILI
0<V <V
1, 2, 3
1, 2, 3
1, 2, 3
1, 2, 3
-1
1
uA
uA
V
IN CC
ILO
0<VOUT<V
-1.5
2.4
1.5
CC
V
IOH = -4mA
OH
V
IOL = 4 mA
0.4
V
OL
1. ICC1 depends on output load conditions when the device is selected. ICC1 (max) is specified with the output open.
2. One bank operation.
3. Input Signals are changed once per one clock.
4. After power down mode, CLK operating current.
5. After power down mode, no CLK operating current.
6. Input signals are changed once per two clocks.
7. Input signals are VIH or VIL fixed.
8. Input signals are changed once per four clocks.
9. After self refresh mode set, self refresh current. Self refresh mode Should be used at temperatures below 70 °C
01.10.05 Rev 2
All data sheets are subject to change without notice
4
©2005 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
