16-Bit Bus Transceivers with 3-State Outputs
54LVTH162245
F
IGURE
4. P
ROPAGATION
D
ELAY
T
IMES
I
NVERTING AND
N
ONINVERTING
O
UTPUTS
F
IGURE
5. E
NABLE AND
D
ISABLE
T
IMES
L
OW
-
AND
H
IGH
-L
EVEL
E
NABLING
Memory
Figure Note:
2. Waveform 1 is for an output with internal conditions such that the output is low except when disabled by
The output control.
Waveform 2 is for an output with internal conditions such that the output is high except when disabled by
the output control.
11.15.02 Rev 2
All data sheets are subject to change without notice
7
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