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5962-3826701M6Q 参数 Datasheet PDF下载

5962-3826701M6Q图片预览
型号: 5962-3826701M6Q
PDF下载: 下载PDF文件 查看货源
内容描述: 微型电路,存储器,数字, CMOS 128K ×8位EEPROM ,单片硅 [MICROCIRCUIT, MEMORY, DIGITAL, CMOS 128K x 8 BIT EEPROM, MONOLITHIC SILICON]
分类和应用: 存储可编程只读存储器电动程控只读存储器电可擦编程只读存储器
文件页数/大小: 40 页 / 315 K
品牌: MAXWELL [ MAXWELL TECHNOLOGIES ]
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TABLE I. Electrical performance characteristics - Continued.  
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Test  
|Symbol  
Conditions  
+125 C  
= 0 V; 4.5 V  
| Group A | Device  
|subgroups | types  
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|9, 10, 11  
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|9, 10, 11  
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|9, 10, 11  
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Limits  
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| Unit  
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| -55 C  
| V  
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|See figures 4, 5, and 6 as  
| applicable. 5/ 8/  
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T
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C
V
5.5 V  
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| Min | Max  
SS  
CC  
unless otherwise specified  
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RES low to output float  
|t  
| 16-19  
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| 16-19  
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| 16-19  
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| 16-19  
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0
0
| 350 | ns  
DFR  
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|t  
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|t  
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|t  
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RES to output delay  
Reset protect time  
Reset high time  
| 450 | ns  
RR  
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| 100  
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| 1.0  
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| µs  
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| µs  
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RP  
|9, 10, 11  
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|9, 10, 11  
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RES  
Time to device busy  
|t  
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| 16-19  
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| 120  
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| ns  
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DB  
1/ Connect all address inputs and OE to V and measure I  
IH  
and I  
with the output under test connected to V  
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OZL  
OZH  
OUT  
Terminal conditions for the output leakage current test shall be as follows:  
a.  
b. For I  
V
= 2.0 V for device types 01-15 and 2.2 V for device types 16-19; V = 0.8 V.  
IH  
IL  
: Select an appropriate address to acquire a logic "1" on the designated output. Apply V to CE.  
IH  
OZL  
Measure the leakage current while applying the specified voltage.  
c. For I  
: Select an appropriate address to acquire a logic "0" on the designated output. Apply V to CE.  
OZH  
IH  
Measure the leakage current while applying the specified voltage.  
2/ A functional test shall verify the dc input and output levels and applicable patterns as appropriate, all input  
and I/O pins shall be tested. Terminal conditions are as follows:  
a. Inputs: H =2.0 V for device types 01-15 and 2.2 V for device types 16-19; L = 0.8 V. Outputs: H = 2.4 V minimum and  
L = 0.4 V maximum.  
b. The functional tests shall be performed with V  
3/ All pins not being tested are to be open.  
= 4.5 and V  
= 5.5 V.  
CC  
CC  
4/ Tested initially and after any design or process changes which may affect that parameter, and therefore shall be  
guaranteed to the limits specified in table I.  
5/ Tested by application of specified timing signals and conditions.  
Equivalent ac test conditions:  
Output load, see figure 5; input rise and fall times 10 ns; input pulse levels, 0.4 V and 2.4 V; timing measurement  
reference levels, inputs, 1.5 V for device types 1-15 and 1 V and 2 V for device types 16-19; outputs, 1.5 V for device types  
1-15 and 0.8 V and 2 V for device types 16-19.  
6/ Chip erase functions are applicable to device types 01-15 only.  
7/ This parameter not applicable for internal timer controlled devices.  
8/ RES functions are applicable to device types 16-19 only.  
SIZE  
STANDARD  
MICROCIRCUIT DRAWING  
5962-38267  
A
DEFENSE SUPPLY CENTER COLUMBUS  
COLUMBUS, OHIO 43216-5000  
REVISION LEVEL  
G
SHEET  
12  
DSCC FORM 2234  
APR 97