Microprocessor-compatible 8-Bit ADC
T
ABLE
1. P
IN
D
ESCRIPTION
P
IN
1
2
3
4
5
6
7
S
YMBOL
V
IN
DB0
DB1
DB2
DB3
WR/RDY
Mode
D
ESCRIPTION
Analog Input Range: V
REF(-)
to V
REF(+)
.
Data Output. Three State Output, bit 0 (LSB)
Data Output. Three State Output, bit 1
Data Output. Three State Output, bit 2
Data Output. Three State Output, bit 3
WRITE control input/READY status output.
Mode Selection Input. It determines whether the device operates in the
WR-RD or RD mode. It is internally tied to GND through a 50 µ A current
source.
READ Input. RD must be low to access data from the part.
INTERUPT Output. INT going low indicates that the conversion is com-
plete INT returns high on rising the edge of RD or CS.
Ground
Lower limit of reference span. Range: GND < V
REF(-)
< V
REF(+)
Upper limit of reference span. Range: GND < V
REF(-)
< V
REF(+)
< V
DD
Chip Select Input. CS, the decoded device address, must be low for RD
or WR to be recognized by the converter.
Data Output. Three State Output, bit 4
Data Output. Three State Output, bit 5
Data Output. Three State Output, bit 6
Data Output. Three State Output, bit 7 (MSB)
Overflow Output. If the analog input is higher than (V
REF(+)
- 1/2LSB),
OFL will be low at the end of conversion. It is a non three state output
which can be used to cascade 2 or more devices to increase resolution.
No Connection.
Power supply voltage, +5V
7820
8
9
10
11
12
13
14
15
16
17
18
RD
INT
GND
V
REF-
V
REF+
CS
DB4
DB5
DB6
DB7
OFL
Memory
19
20
NC
V
DD
T
ABLE
2. 7820 A
BSOLUTE
M
AXIMUM
R
ATINGS1
P
ARAMETER
V
DD
to GND
Digital Input Voltage to GND (Pins 6-80, 13)
Digital Output Voltage to GND (Pins 2-5, 9, 14-18)
V
REF
(+) to GND
V
REF
(-) to GND
M
IN
-0
-0.3
0.3
0
V
SS
-0.3
M
AX
7.0
V
DD
+0.3
V
DD
+0.3
V
DD
+0.3
V
REF
(+)
U
NIT
V
V
V
V
V
09.09.03 Rev 3
All data sheets are subject to change without notice
2
©2003 Maxwell Technologies
All rights reserved.
MAXWELL [ MAXWELL TECHNOLOGIES ]
