MDT2005IB 参数 Datasheet PDF下载

MDT2005(IB)

7. Reset Condition for all Registers

Register

CPIO A

CPIO B

TMR

IAR

RTCC

PC

STATUS

MSR

PORT A

PORT B

Address

－－

－－

－－

00h

01h

02h

03h

04h

05h

06h

Power-On Reset

1111 1111

1111 1111

--11 1111

－

xxxx xxxx

1111 1111

0001 1xxx

111x xxxx

- - - - xxxx

xxxx xxxx

/MCLR or WDT Reset

1111 1111

1111 1111

--11 1111

－

uuuu uuuu

1111 1111

000# #uuu

111u uuuu

- - - - uuuu

uuuu uuuu

Note : u＝unchanged, x��unknown, -

＝unimplemented,

read as “0”

#＝value depends on the condition of the following table

Condition

/MCLR reset (not during SLEEP)

/MCLR reset during SLEEP

WDT reset (not during SLEEP)

WDT reset during SLEEP

Status: bit 4

u

1

0

0

Status: bit 3

u

0

1

0

8. Instruction Set

Instruction Code

010000 00000000

010000 00000001

010000 00000010

010000 00000011

010000 00000100

010000 00000rrr

010001 1rrrrrrr

011000 trrrrrrr

111010 iiiiiiii

Mnemonic

Operands

NOP

CLRWT

SLEEP

TMODE

RET

CPIO R

STWR R

LDR R, t

LDWI I

Function

No operation

Clear Watchdog timer

Sleep mode

Load W to TMODE register

Return

Control I/O port register

Store W to register

Load register

Load immediate to W

Operating

None

0→WT

W→TMODE

Stack→PC

W→CPIO r

W→R

R→t

I→W

TF, PF

None

None

None

None

Z

None

0→WT, stop OSC TF, PF

Status

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P. 5

2005/6 VER1.3