KS8993
Pin Number
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65
66
67
68
69
70
71
72
73
74
75
76
Note 1.
Micrel
Pin Name
TEST[1]
TEST[2]
GND_RCV[2]
VDD_RCV[2]
GND_RCV[3]
VDD_RCV[3]
VMDIS
FFLOW2#
PV32
PV31
PV23
FFLOW1#
PV21
PV13
PV12
DISAN3
VDD
GND
MTXEN
MTXD[3]
MTXD[2]
MTXD[1]
MTXD[0]
MTXER
MTXCLK
MRXDV
MRXD[3]
MRXD[2]
MRXD[1]
MRXD[0]
VDD_IO
GND
MRXCLK
MCOL
MCRS
MCOLIN
MIIS[1]
MIIS[0]
Type
(Note 1)
I
I
GND
Pwr
GND
P
I
I
I
I
I
I
I
I
I
I
Pwr
GND
I
I
I
I
I
I
I/O
O
O
O
O
O
Pwr
GND
I/O
O
I/O
I
I
I
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
3
2
3
3
2
1
2
1
1
3
2
2
3
3
Port
Pin Function
Factory test pin
Factory test pin
Ground for clock recovery circuitry
2.5V for clock recovery circuitry
Ground for clock recovery circuitry
2.5V for clock recovery circuitry
DIScard VLAN Mismatch packets
Force flow control on port 2
Port 3 VLAN Port mask bit 1
Port 3 VLAN Port mask bit 0
Port 2 VLAN Port mask bit 2
Force flow control on port 1
Port 2 VLAN Port mask bit 0
Port 1 VLAN Port mask bit 2
Port 1 VLAN Port mask bit 1
Port 3 auto-negotiation disable (pull this down to enable port 3 auto
negotiation)
2.5V for core digital circuitry
Ground for digital circuitry
MII transmit enable
MII transmit bit 3
MII transmit bit 2
MII transmit bit 1
MII transmit bit 0
MII transmit error
MII output clock
MII receive data valid
MII receive bit 3
MII receive bit 2
MII receive bit 1
MII receive bit 0
2.5V or 3.3V for MII interface, LEDs and other digital I/O
Ground for digital circuitry
MII input clock
MII collision detect output
MII carrier sense
MII collision detect input
MII mode select bit 1
MII mode select bit 0
Pwr = power supply
GND = ground
I = input
O = output
I/O = bi-directional
April 2009
7
KS8993