KS8993M/ML/MI
Integrated 3-Port 10/100 Managed
Switch with PHYs
Rev 1.04
General Description
The KS8993M, a highly integrated Layer 2 managed
switch, is designed for low port count, cost-sensitive
10/100 Mbps switch systems. It offers an extensive
feature set that includes tag/port-based VLAN,
quality of service (QoS) priority, management,
management information base (MIB) counters,
MII/SNI, and CPU control/data interfaces to
effectively address both current and emerging Fast
Ethernet applications.
The KS8993M contains two 10/100 transceivers with
patented mixed-signal low-power technology, three
media access control (MAC) units, a high-speed
non-blocking switch fabric, a dedicated address
lookup engine, and an on-chip frame buffer memory.
Both PHY units support 10BASE-T and 100BASE-
TX. In addition, one of the PHY unit supports
100BASE-FX.
The KS8993ML is the single supply version with all
the identical rich features of the KS8993M.
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Functional Diagram
1KLook-Up
Engine
AUTO
MDI/MDI-X
10/100
T/TX/FX
PHY 1
10/100
MAC1
Queue
Manageme
nt
FIF
O,Flow Control, VLANTagging,Priority
AUTO
MDI/MDI-X
10/100
T/TX
PHY 2
10/100
MAC2
Buffer
Manageme
nt
MII/SNI
10/100
MAC3
Frame
Buffers
SNI
SPI
SPI
MIB
Counters
MIIM
SMI
I2C
P1 LED[3:0]
P2 LED[3:0]
Control
Registers
EEP
ROM
Interface
LED
Drivers
Strap-In
Configuration Pins
Micrel Inc. • 2180 Fortune Drive • San Jose, CA 95131 • USA • tel +1 (
408
) 944-0800 • fax + 1 (408) 474-1000 • http://www.micrel.com
April 2005
1
M9999-041205
MICREL [ MICREL SEMICONDUCTOR ]
