24AAXX/24LCXX/24FCXX
TABLE 1-1:
Part Number
128 Kb devices
24AA128
24LC128
24FC128
256 Kb devices
24AA256
24LC256
24FC256
512 Kb devices
24AA512
24LC512
24FC512
1.7-5.5V
2.5-5.5V
400 kHz
(2)
400 kHz
128
bytes
I
Entire Array
A0, A1, A2
I, E
I
P, SM, MF, ST14
1.7-5.5V
2.5-5.5V
1.7-5.5V
400 kHz
(2)
400 kHz
1 MHz
(3)
64 bytes
Entire Array
A0, A1,
A2
(4)
I
I, E
I
P, SN, SM, ST, MS, MF,
ST14
1.7-5.5V
2.5-5.5V
1.7-5.5V
400 kHz
(2)
400 kHz
1 MHz
(3)
64 bytes
Entire Array
A0, A1,
A2
(4)
I
I, E
I
P, SN, SM, ST, MS, MF,
ST14
DEVICE SELECTION TABLE (CONTINUED)
V
CC
Range
Max. Clock
Frequency
Page
Size
Write-
Protect
Scheme
Functional
Address
Pins
Temp.
Range
Packages
(5)
1.7-5.5V
(3)
1 MHz
Note 1:
100 kHz for V
CC
<4.5V.
2:
100 kHz for V
CC
<2.5V.
3:
400 kHz for V
CC
<2.5V.
4:
Pins A0 and A1 are no-connects for the 24XX128 and 24XX256 in the MSOP package.
5:
P = 8-PDIP, SN = 8-SOIC (3.90 mm JEDEC), ST = 8-TSSOP, OT = 5 or 6-SOT23, MC = 2x3mm DFN,
MS = 8-MSOP, SM = 8-SOIC (200 mil EIAJ), MF = 5x6mm DFN.
©
2007 Microchip Technology Inc.
DS21930B-page 3