MCP2021/2
1.3
Modes of Operation
1.3.4
OPERATION MODE
For an overview of all operational modes, please refer
to
In this mode, all internal modules are operational.
The MCP2021/2 will go into the Power-down mode on
the falling edge of CS/LWAKE.
1.3.1
POWER-ON-RESET MODE
Upon application of V
BB
, the device enters Power-On-
Reset mode (POR). During this mode, the part
maintains the digital section in a reset mode and waits
until the voltage on pin V
BB
rises above the “ON”
threshold (Typ. 5.75V) to enter to the Ready mode. If
during the operation, the voltage on pin V
BB
falls below
the “OFF” threshold (Typ. 4.25V), the part comes back
to the Power-On-Reset mode.
1.3.5
TRANSMITTER OFF MODE
Whenever the FAULT/TXE signal is low and the L
BUS
transmitter is off.
The transmitter may be re-enabled whenever the
FAULT/TXE signal returns high, either by removing the
internal fault condition or the CPU returning the FAULT/
TXE high. The transmitter will not be enabled if the
FAULT/TXE pin is brought high when the internal fault
is still present.
The transmitter is also turned off whenever the voltage
regulator is unstable or recovering from a fault. This
prevents unwanted disruption of the bus during times of
uncertain operation.
1.3.2
POWER-DOWN MODE
In the Power-down mode, the transmitter and the
voltage regulator are both off. Only the receiver
section, and the CS/LWAKE pin wake-up circuits are in
operation. This is the lowest power mode.
If any bus activity (e.g. a BREAK character) or CS/
LWAKE going to a high level should occur during
Power-down mode, the device will immediately enter
the Ready mode, enable the voltage regulator, and
once the output has stabilized (approximately 0.3 ms to
1.2 ms), go to the Operation mode.
Note:
The above time interval < 1.2 ms assumes
12V V
BB
input and no thermal shutdown
event.
1.3.5.1
Wake-up
The Wake-up sub module observes the L
BUS
in order
to detect bus activity. Bus activity is detected when the
voltage on the L
BUS
stays below a threshold of
approximately 3V for at least a typical duration of 10 µs.
Such a condition causes the device to leave the Power-
down mode.
FIGURE 1-2:
CS/LWAKE
= false
The part will also enter the Ready mode, followed by
the Operation mode, if the CS/LWAKE pin should
become active true (‘1’).
The part may only enter the Power-down mode after
going through an Operation mode step.
OPERATIONAL MODES
STATE DIAGRAMS
Power-down
Mode
Bus Activity
OR
CS/LWAKE = true
1.3.3
READY MODE
Upon entering the Ready mode, the voltage regulator
and receiver threshold detect circuit are powered up.
The transmitter remains in power down mode. The
device is ready to receive data but not to transmit. If a
microcontroller is being driven by the voltage regulator
output, it will go through a Power-on Reset and initial-
ization sequence. The LIN pin is in the recessive state.
The device will stay in the Ready mode until the output
of the voltage regulator has stabilized and CS/LWAKE
pin is true (‘1’). After V
REG
is OK and CS/LWAKE pin is
true, the transmitter is enabled and the part enters the
Operation mode.
On Power-on of the V
BB
supply pin, the component will
stay in the Ready mode if CS/LWAKE is low. If CS/
LWAKE is high, the device will immediately enter the
Operation mode.
Transmitter
Off
Mode
FAULT/TXE
= false
CS/LWAKE
= false
Operation
Mode
Ready
Mode
V
BB
OK = true
FAULT/TXE = true
V
REG
OK = true
AND
CS/LWAKE = true
Start
POR
Note:
While the MCP2021/2 is in shutdown, T
XD
should not be actively driven high or it may
power internal logic through the ESD
diodes and may damage the device.
DS22018E-page 4
©
2009 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
