PIC16C745/765
FIGURE 3-1:
PIC16C745/765 BLOCK DIAGRAM
13
EPROM
Program
Memory
8K x 14
Program
Bus
14
Instruction reg
Direct Addr
7
8 Level Stack
(13 bit)
Program Counter
Data Bus
8
PORTA
RA0/AN0
RA1/AN1
RA2/AN2
RA3/AN3/V
REF
RA4/T0CKI
RA5/AN4
PORTB
RAM
File
Registers
256 x 8
RAM Addr(1)
9
Addr MUX
8
Indirect
Addr
RB0/INT
RB<7:1>
FSR reg
STATUS reg
8
3
PORTC
Power-up
Timer
Instruction
Decode &
Control
OSC1/
CLKIN
OSC2/
CLKOUT
Timing
Generation
x4 PLL
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
8
W reg
MUX
RC0/T1OSO/T1CKI
RC1/T1OSI/CCP2
RC2/CCP1
RC6/TX/CK
RC7/RX/DT
ALU
PORTD
RD3:0/PSP3:0
(2)
RD4/PSP4
(2)
RD5/PSP5
(2)
RD6/PSP6
(2)
RD7/PSP7
(2)
Parallel Slave Port
(2)
MCLR
V
DD
, V
SS
PORTE
RE0/AN5/RD
(2)
RE1/AN6/WR
(2)
RE2/AN7/CS
(2)
Timer0
Timer1
Timer2
8-bit A/D
CCP2
CCP1
USART
Dual Port
RAM
64 x 8
USB
XCVR
V
USB
D-
D+
Note 1:
Higher order bits are from the STATUS register.
2:
Not available on PIC16C745.
DS41124A-page 10
Advanced Information
©
1999 Microchip Technology Inc.