PIC16CR54C
FIGURE 3-1:
PIC16CR54C SERIES BLOCK DIAGRAM
9-11
ROM
512 X 12
12
INSTRUCTION
REGISTER
9
12
8
INSTRUCTION
DECODER
DIRECT ADDRESS
DIRECT RAM
ADDRESS
6
OPTION REG.
FROM W
5
8
LITERALS
STATUS
TMR0
DATA BUS
ALU
FROM W
4
“TRIS 5”
TRISA
PORTA
4
RA3:RA0
4
“TRIS 6”
8
FROM W
8
TRISB
8
PORTB
FSR
8
W
“OPTION”
GENERAL
PURPOSE
REGISTER
FILE
(SRAM)
25 Bytes
WDT TIME
OUT
WDT/TMR0
PRESCALER
CLKOUT
9-11
PC
WATCHDOG
TIMER
“CODE
PROTECT”
STACK 1
STACK 2
T0CKI
PIN
OSC1 OSC2 MCLR
CONFIGURATION WORD
“DISABLE”
“OSC
SELECT”
2
OSCILLATOR/
TIMING &
CONTROL
“SLEEP”
8
RB7:RB0
DS40191A-page 10
Preliminary
©
1998 Microchip Technology Inc.