PIC16F62X
FIGURE 3-1:
BLOCK DIAGRAM
13
FLASH
Program
Memory
8 Level Stack
(13-bit)
Program
Bus
14
Instruction reg
Direct Addr
7
Program Counter
Data Bus
8
RAM
File
Registers
Data EEPROM
RAM Addr (1)
9
PORTA
RA0/AN0
RA1/AN1
RA2/AN2/V
REF
RA3/AN3/CMP1
RA4/T0CK1/CMP2
RA5/MCLR/THV
RA6/OSC2/CLKOUT
RA7/OSC1/CLKIN
Addr MUX
8
Indirect
Addr
FSR reg
STATUS reg
8
3
PORTB
Power-up
Timer
Instruction
Decode &
Control
Timing
Generation
OSC1/CLKIN
OSC2/CLKOUT
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Detect
Low-Voltage
Programming
8
MUX
ALU
W reg
RB0/INT
RB1/RX/DT
RB2/TX/CK
RB3/CCP1
RB4/PGM
RB5
RB6/T1OSO/T1CKI
RB7/T1OSI
MCLR
V
DD
, V
SS
Comparator
Timer0
Timer1
Timer2
V
REF
CCP1
USART
Memory
Device
PIC16F627
PIC16F628
PIC16LF627
PIC16LF628
FLASH
Program
1024 x 14
2048 x 14
1024 x 14
2048 x 14
RAM
Data
224 x 8
224 x 8
224 x 8
224 x 8
EEPROM
Data
128 x 8
128 x 8
128 x 8
128 x 8
Note 1:
Higher order bits are from the STATUS register.
DS40300B-page 10
Preliminary
©
1999 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
