PIC16F631/677/685/687/689/690
FIGURE 1-2:
PIC16F677 BLOCK DIAGRAM
INT
Configuration
13
Program Counter
Flash
2K x 14
Program
Memory
Program 14
Bus
Instruction Reg
Direct Addr
7
8-Level Stack (13-bit)
RAM
128 bytes
File
Registers
9
RAM Addr
PORTB
Data Bus
8
PORTA
RA0
RA1
RA2
RA3
RA4
RA5
Addr MUX
8
Indirect
Addr
RB4
RB5
RB6
RB7
FSR Reg
STATUS Reg
PORTC
3
Instruction
Decode and
Control
OSC1/CLKI
OSC2/CLKO
Timing
Generation
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Internal
Oscillator
Block
MCLR V
DD
ULPWU
T0CKI
V
SS
T1G
T1CKI
8
W Reg
ALU
MUX
8
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
SDI/ SCK/
SDO SDA SCL SS
Ultra Low-Power
Wake-up
Timer0
Timer1
Synchronous
Serial Port
AN8 AN9 AN10 AN11
EEDAT
2
Analog Comparators
and Reference
8
256 Bytes
Data
EEPROM
EEADR
Analog-to-Digital Converter
V
REF
AN0 AN1 AN2 AN3 AN4 AN5 AN6 AN7 C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT
DS41262E-page 10
©
2008 Microchip Technology Inc.