PIC16F631/677/685/687/689/690
1.0
DEVICE OVERVIEW
The PIC16F631/677/685/687/689/690 devices are
covered by this data sheet. They are available in 20-pin
PDIP, SOIC, TSSOP and QFN packages.
Block Diagrams and pinout descriptions of the devices
are as follows:
•
•
•
•
•
PIC16F631 (Figure 1-1, Table 1-1)
PIC16F677 (Figure 1-2, Table 1-2)
PIC16F685 (Figure 1-3, Table 1-3)
PIC16F687/PIC16F689 (Figure 1-4, Table 1-4)
PIC16F690 (Figure 1-5, Table 1-5)
FIGURE 1-1:
PIC16F631 BLOCK DIAGRAM
INT
Configuration
13
Program Counter
Flash
1K x 14
Program
Memory
8-Level Stack (13-bit)
RAM
64 bytes
File
Registers
9
RAM Addr
PORTB
Data Bus
8
PORTA
RA0
RA1
RA2
RA3
RA4
RA5
Program 14
Bus
Instruction Reg
Direct Addr
7
Addr MUX
8
Indirect
Addr
RB4
RB5
RB6
RB7
FSR Reg
STATUS Reg
PORTC
3
Instruction
Decode and
Control
OSC1/CLKI
OSC2/CLKO
Timing
Generation
Power-up
Timer
Oscillator
Start-up Timer
Power-on
Reset
Watchdog
Timer
Brown-out
Reset
Internal
Oscillator
Block
MCLR V
DD
ULPWU
T0CKI
V
SS
T1G
T1CKI
EEDAT
128 Bytes
Data
EEPROM
Timer0
Timer1
EEADR
8
8
W Reg
ALU
MUX
8
RC0
RC1
RC2
RC3
RC4
RC5
RC6
RC7
C1IN- C1IN+ C1OUT C2IN- C2IN+ C2OUT
Ultra Low-Power
Wake-up
2
Analog Comparators
and Reference
©
2008 Microchip Technology Inc.
DS41262E-page 9