PIC18F2480/2580/4480/4580
22.0
COMPARATOR VOLTAGE
REFERENCE MODULE
each with 16 distinct levels. The range to be used is
selected by the CVRR bit (CVRCON<5>). The primary
difference between the ranges is the size of the steps
selected by the CV
REF
Selection bits (CVR<3:0>), with
one range offering finer resolution. The equations used
to calculate the output of the comparator voltage
reference are as follows:
If CVRR =
1:
CV
REF
= ((CVR<3:0>)/24) x CV
RSRC
If CVRR =
0:
CV
REF
= (CV
DD
x 1/4) + (((CVR<3:0>)/32) x
CV
RSRC
)
The comparator reference supply voltage can come
from either V
DD
and V
SS
, or the external V
REF
+ and
V
REF
- that are multiplexed with RA2 and RA3. The
voltage source is selected by the CVRSS bit
(CVRCON<4>).
The settling time of the comparator voltage reference
must be considered when changing the CV
REF
output
(see Table 28-3 in
The comparator voltage reference is a 16-tap resistor
ladder network that provides a selectable reference
voltage. Although its primary purpose is to provide a
reference for the analog comparators, it may also be
used independently of them.
A block diagram is of the module shown in
provide two ranges of CV
REF
values and has a
power-down function to conserve power when the
reference is not being used. The module’s supply
reference can be provided from either device V
DD
/V
SS
or an external voltage reference.
22.1
Configuring the Comparator
Voltage Reference
The voltage reference module is controlled through the
CVRCON register (Register 22-1). The comparator
voltage reference provides two ranges of output voltage,
REGISTER 22-1:
R/W-0
CVREN
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
CVRCON: COMPARATOR VOLTAGE REFERENCE CONTROL REGISTER
R/W-0
R/W-0
CVRR
R/W-0
CVRSS
R/W-0
CVR3
R/W-0
CVR2
R/W-0
CVR1
R/W-0
CVR0
bit 0
CVROE
(1)
W = Writable bit
‘1’ = Bit is set
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
x = Bit is unknown
CVREN:
Comparator Voltage Reference Enable bit
1
= CV
REF
circuit powered on
0
= CV
REF
circuit powered down
CVROE:
Comparator V
REF
Output Enable bit
(1)
1
= CV
REF
voltage level is also output on the RA0/AN0/CV
REF
pin
0
= CV
REF
voltage is disconnected from the RA0/AN0/CV
REF
pin
CVRR:
Comparator V
REF
Range Selection bit
1
= 0.00 CV
RSRC
to 0.75 CV
RSRC
, with CV
RSRC
/24 step size
0
= 0.25 CV
RSRC
to 0.75 CV
RSRC
, with CV
RSRC
/32 step size
CVRSS:
Comparator V
REF
Source Selection bit
1
= Comparator reference source, CV
RSRC
= (V
REF
+) – (V
REF
-)
0
= Comparator reference source, CV
RSRC
= V
DD
– V
SS
CVR<3:0>:
Comparator V
REF
Value Selection bits (0
≤
(CVR<3:0>)
≤
15)
When CVRR =
1:
CV
REF
= ((CVR<3:0>)/24)
•
(CV
RSRC
)
When CVRR =
0:
CV
REF
= (CV
RSRC
/4) + ((CVR<3:0>)/32)
•
(CV
RSRC
)
CVROE overrides the TRISA<0> bit setting. If enabled for output, RA2 must also be configured as an
input by setting TRISA<2> to ‘1’.
bit 6
bit 5
bit 4
bit 3-0
Note 1:
©
2009 Microchip Technology Inc.
DS39637D-page 269
MICROCHIP [ MICROCHIP TECHNOLOGY ]
