PIC18F2480/2580/4480/4580
28/40/44-Pin Enhanced Flash Microcontrollers with
ECAN™ Technology, 10-Bit A/D and nanoWatt Technology
Power-Managed Modes:
•
•
•
•
•
•
•
•
Run: CPU on, Peripherals on
Idle: CPU off, Peripherals on
Sleep: CPU off, Peripherals off
Idle mode Currents Down to 6.1
μA
Typical
Sleep mode Current Down to 0.2
μA
Typical
Timer1 Oscillator: 1
μA,
32 kHz, 2V
Watchdog Timer: 1.7
μA
Two-Speed Oscillator Start-up
Peripheral Highlights:
•
•
•
•
High-Current Sink/Source 25 mA/25 mA
Three External Interrupts
One Capture/Compare/PWM (CCP) module
Enhanced Capture/Compare/PWM (ECCP) module
(40/44-pin devices only):
- One, two or four PWM outputs
- Selectable polarity
- Programmable dead time
- Auto-shutdown and auto-restart
Master Synchronous Serial Port (MSSP) module
Supporting 3-Wire SPI (all 4 modes) and I
2
C™
Master and Slave modes
Enhanced Addressable USART module
- Supports RS-485, RS-232 and LIN/J2602
- RS-232 operation using internal oscillator
block
- Auto-wake-up on Start bit
- Auto-Baud Detect
10-Bit, up to 11-Channel Analog-to-Digital
Converter (A/D) module, up to 100 ksps
- Auto-acquisition capability
- Conversion available during Sleep
Dual Analog Comparators with Input Multiplexing
Flexible Oscillator Structure:
• Four Crystal modes, up to 40 MHz
• 4x Phase Lock Loop (PLL) – Available for Crystal
and Internal Oscillators)
• Two External RC modes, up to 4 MHz
• Two External Clock modes, up to 40 MHz
• Internal Oscillator Block:
- Fast wake from Sleep and Idle, 1
μs
typical
- 8 user-selectable frequencies, from 31 kHz to 8 MHz
- Provides a complete range of clock speeds,
from 31 kHz to 32 MHz when used with PLL
- User-tunable to compensate for frequency drift
• Secondary Oscillator using Timer1 @ 32 kHz
• Fail-Safe Clock Monitor
- Allows for safe shutdown if peripheral clock stops
•
•
•
•
ECAN Technology Module Features:
• Message Bit Rates up to 1 Mbps
• Conforms to CAN 2.0B Active Specification
• Fully Backward Compatible with PIC18XXX8 CAN
modules
• Three Modes of Operation:
- Legacy, Enhanced Legacy, FIFO
• Three Dedicated Transmit Buffers with Prioritization
• Two Dedicated Receive Buffers
• Six Programmable Receive/Transmit Buffers
• Three Full 29-Bit Acceptance Masks
• 16 Full 29-Bit Acceptance Filters w/Dynamic
Association
• DeviceNet™ Data Byte Filter Support
• Automatic Remote Frame Handling
• Advanced Error Management Features
Special Microcontroller Features:
• C Compiler Optimized Architecture with Optional
Extended Instruction Set
• 100,000 Erase/Write Cycle Enhanced Flash
Program Memory Typical
• 1,000,000 Erase/Write Cycle Data EEPROM
Memory Typical
• Flash/Data EEPROM Retention: > 40 Years
• Self-Programmable under Software Control
• Priority Levels for Interrupts
• 8 x 8 Single-Cycle Hardware Multiplier
• Extended Watchdog Timer (WDT):
- Programmable period from 41 ms to 131s
• Single-Supply 5V In-Circuit Serial
Programming™ (ICSP™) via Two Pins
• In-Circuit Debug (ICD) via Two Pins
• Wide Operating Voltage Range: 2.0V to 5.5V
Program Memory
Device
PIC18F2480
PIC18F2580
PIC18F4480
PIC18F4580
Data Memory
I/O
25
25
36
36
Flash # Single-Word SRAM EEPROM
(bytes) Instructions (bytes) (bytes)
16K
32K
16K
32K
8192
16384
8192
16384
768
1536
768
1536
256
256
256
256
10-Bit
A/D (ch)
8
8
11
11
CCP/
ECCP
(PWM)
1/0
1/0
1/1
1/1
EUSART
MSSP
SPI
Y
Y
Y
Y
Master
I
2
C™
Y
Y
Y
Y
Comp.
0
0
2
2
Timers
8/16-bit
1/3
1/3
1/3
1/3
1
1
1
1
©
2009 Microchip Technology Inc.
DS39637D-page 3
MICROCHIP [ MICROCHIP TECHNOLOGY ]
