PIC18F2480/2580/4480/4580
The long write is necessary for programming the inter-
7.5
Writing to Flash Program Memory
nal Flash. Instruction execution is halted while in a long
write cycle. The long write will be terminated by the
internal programming timer.
The minimum programming block is 16 words or
32 bytes. Word or byte programming is not supported.
Table writes are used internally to load the holding
registers needed to program the Flash memory. There
are 32 holding registers used by the table writes for
programming.
The EEPROM on-chip timer controls the write time.
The write/erase voltages are generated by an on-chip
charge pump, rated to operate over the voltage range
of the device.
Since the Table Latch (TABLAT) is only a single byte, the
TBLWTinstruction may need to be executed 32 times for
each programming operation. All of the table write oper-
ations will essentially be short writes because only the
holding registers are written. At the end of updating the
32 holding registers, the EECON1 register must be
written to in order to start the programming operation
with a long write.
Note:
The default value of the holding registers on
device Resets and after write operations is
FFh. A write of FFh to a holding register
does not modify that byte. This means that
individual bytes of program memory may be
modified, provided that the change does not
attempt to change any bit from a ‘0’ to a ‘1’.
When modifying individual bytes, it is not
necessary to load all 32 holding registers
before executing a write operation.
FIGURE 7-5:
TABLE WRITES TO FLASH PROGRAM MEMORY
TABLAT
Write Register
8
8
8
8
TBLPTR = xxxxx0
TBLPTR = xxxxx1
TBLPTR = xxxxx2
TBLPTR = xxxxxF
Holding Register
Holding Register
Holding Register
Holding Register
Program Memory
8. Disable interrupts.
7.5.1
FLASH PROGRAM MEMORY WRITE
SEQUENCE
9. Write 55h to EECON2.
10. Write 0AAh to EECON2.
The sequence of events for programming an internal
program memory location should be:
11. Set the WR bit. This will begin the write cycle.
12. The CPU will stall for duration of the write (about
2 ms using internal timer). After writing to the
holding registers, it will be set to 0xFF.
1. Read 64 bytes into RAM.
2. Update data values in RAM as necessary.
3. Load Table Pointer register with address being
erased.
13. Repeat the question three more times.
14. Re-enable interrupts.
4. Execute the row erase procedure.
15. Verify the memory (table read).
5. Load Table Pointer register with address of first
byte being written.
This procedure will require about 6 ms to update one
row of 64 bytes of memory. An example of the required
code is given in Example 7-3.
6. Write the 32 bytes into the holding registers with
auto-increment.
7. Set the EECON1 register for the write operation:
• set EEPGD bit to point to program memory;
• clear the CFGS bit to access program memory;
• set WREN to enable byte writes.
Note:
Before setting the WR bit, the Table
Pointer address needs to be within the
intended address range of the 32 bytes in
the holding register.
© 2009 Microchip Technology Inc.
DS39637D-page 107
MICROCHIP [ MICROCHIP ]
