TC4426A/TC4427A/TC4428A
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
8-Pin PDIP/
MSOP/SOIC
1
2
3
4
5
6
7
8
—
Note 1:
PIN FUNCTION TABLE
8-Pin
DFN
1
2
3
4
5
6
7
8
PAD
Symbol
NC
IN A
GND
IN B
OUT B
V
DD
OUT A
NC
NC
No connection
Input A
Ground
Input B
Output B
Supply input
Output A
No connection
Exposed Metal Pad
Description
Duplicate pins must be connected for proper operation.
3.1
Inputs A and B
3.4
Supply Input (V
DD
)
MOSFET driver inputs A and B are high-impedance,
TTL/CMOS compatible inputs. These inputs also have
300 mV of hysteresis between the high and low
thresholds that prevents output glitching, even when
the rise and fall time of the input signal is very slow.
The V
DD
input is the bias supply for the MOSFET driver
and is rated for 4.5V to 18V, with respect to the ground
pin. The V
DD
input should be bypassed with local
ceramic capacitors. The value of these capacitors
should be chosen based on the capacitive load that is
being driven.
3.2
Ground (GND)
3.5
Exposed Metal Pad
The exposed metal pad of the 6x5 DFN package is not
internally connected to any potential. Therefore, this
pad can be connected to a ground plane or other
copper plane on a printed circuit board, to aid in heat
removal from the package.
The ground pin is the return path for both the bias
current and the high peak current that discharges the
external load capacitance. The ground pin should be
tied into a ground plane or have a very short trace to the
bias supply source return.
3.3
Output A and B
MOSFET driver outputs A and B are low-impedance,
CMOS push-pull style outputs. The pull-down and pull-
up devices are of equal strength, making the rise and
fall times equivalent.
DS21423F-page 8
©
2006 Microchip Technology Inc.
MICROCHIP [ MICROCHIP TECHNOLOGY ]
