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LX1664CD 参数 Datasheet PDF下载

LX1664CD图片预览
型号: LX1664CD
PDF下载: 下载PDF文件 查看货源
内容描述: 5位DAC双输出PWM控制器 [DUAL OUTPUT PWM CONTROLLERS WITH 5-BIT DAC]
分类和应用: 稳压器开关式稳压器或控制器电源电路开关式控制器光电二极管输出元件
文件页数/大小: 17 页 / 353 K
品牌: MICROSEMI [ MICROSEMI CORPORATION ]
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PRODUCT DATABOOK 1996/1997
LX1664/1664A, LX1665/65A
D
UAL
O
UTPUT
PWM C
ONTROLLERS
P
Pin
Name
SS
INV
V
CC_CORE
VID0
VID1
VID2
VID3
VID4
R O D U C T I O N
WITH
5-B
IT
DAC
D
A T A
S
H E E T
FUNCTIONAL PIN DESCRIPTION
LX1664
Pin #
1
2
3
4
5
6
7
8
LX1665
Pin #
1
2
3
4
5
6
7
8
Description
Soft-Start pin, internally connected to the non-inverting input of the error comparator.
Inverting input of the error comparator.
Output voltage. Connected to non-inverting input of the current-sense comparator.
Voltage Identification pin (LSB) input used to set output voltage.
Voltage Identification pin (2
nd
SB) input.
Voltage Identification pin (3
rd
SB) input.
Voltage Identification pin (4
th
SB) input.
Voltage Identification pin (MSB) input. This pin is also the range select pin — when low
(CLOSED), output voltage is set to between 1.30 and 2.05V in 0.05V increments. When high
(OPEN), output is adjusted from 2.0 to 3.5V in 0.1V increments.
Linear regulator feedback pin. 1.5V reference is connected to a resistor divider to set desired
output voltage.
Open collector output pulls low when the output voltage is out of limits.
Linear regulator drive pin. Connect to gate of MOSFET for linear regulator function.
SCR driver goes high when the processor's supply is over specified voltage limits.
The off-time is programmed by connecting a timing capacitor to this pin.
This is the (12V) supply to the IC, as well as gate drive to the bottom FET.
This is the gate drive to the bottom FET. Leave open in non-synchronous operation (when bottom
FET is replaced by a Schottky diode).
Both power and signal ground of the device.
Gate drive for top MOSFET.
This pin is a separate power supply input for the top drive. Can be connected to a charge pump
when only 12V is available.
L
FB
PWRGD
L
DRV
OV
C
T
V
CC
BDRV
GND
TDRV
V
C1
9
N.C.
10
N.C.
11
12
13
14
15
16
9
10
11
12
13
14
15
16
17
18
Copyright © 1999
Rev. 1.2 11/99
7