SG1626/SG2626/SG3626
APPLICATION INFORMATION
POWER DISSIPATION
The SG1626, while more energy-efficient than earlier gold-doped
driver IC’s, can still dissipate considerable power because of its
high peak current capability at high frequencies. Total power
dissipation in any specific application will be the sum of the DC or
steady-state power dissipation, and the AC dissipation caused by
driving capacitive loads.
The DC power dissipation is given by:
P
DC
= +V
CC
· I
CC
[1]
where I
CC
is a function of the driver state, and hence is duty-cycle
dependent.
The AC power dissipation is proportional to the switching fre-
quency, the load capacitance, and the square of the output
voltage. In most applications, the driver is constantly changing
state, and the AC contribution becomes dominant when the
frequency exceeds 100-200KHz.
The SG1626 driver family is available in a variety of packages to
accommodate a wide range of operating temperatures and
power dissipation requirements. The Absolute Maximums sec-
tion of the data sheet includes two graphs to aid the designer in
choosing an appropriate package for his design.
The designer should first determine the actual power dissipation
of the driver by referring to the curves in the data sheet relating
operating current to supply voltage, switching frequency, and
capacitive load. These curves were generated from data taken
on actual devices. The designer can then refer to the Absolute
Maximum Thermal Dissipation curves to choose a package type,
and to determine if heat-sinking is required.
DESIGN EXAMPLE
Given: Two 2500 pF loads must be driven push-pull from a +15
volt supply at 100KHz. This is a commercial application where
the maximum ambient temperature is +50°C, and cost is impor-
tant.
1. From Figure 11, the average driver current consumption
under these conditions will be 18mA, and the power dissipation
will be 15volts x 18mA, or 270mW.
2. From the Ambient Thermal Characteristic curve, it can be
seen that the M package, which is an 8-pin plastic DIP with a
copper lead frame, has more than enough thermal conductance
from junction to ambient to support operation at an ambient
temperature of +50°C. The SG3626M driver would be specified
for this application.
SUPPLY BYPASSING
Since the SG1626 can deliver peak currents above 3amps under
some load conditions, adequate supply bypassing is essential for
proper operation. Two capacitors in parallel are recommended
to guarantee low supply impedance over a wide bandwidth: a
0.1µF ceramic disk capacitor for high frequencies, and a 4.7µF
solid tantalum capacitor for energy storage. In military applica-
9/91 Rev 1.1 2/94
Copyright
©
1994
tions, a CK05 or CK06 ceramic operator with a CSR-13 tantalum
capacitor is an effective combination. For commercial applica-
tions, any low-inductance ceramic disk capacitor teamed with a
Sprague 150D or equivalent low ESR capacitor will work well.
The capacitors must be located as close as physically possible to
the V
CC
pin, with combined lead and pc board trace lengths held
to less than 0.5 inches.
GROUNDING CONSIDERATIONS
Since ground is both the reference potential for the driver logic
and the return path for the high peak output currents of the driver,
use of a low-inductance ground system is essential. A ground
plane is highly recommended for best performance. In dense,
high performance applications a 4-layer pc board works best; the
2 inner planes are dedicated to power and ground distribution,
and signal traces are carried by the outside layers. For cost-
sensitive designs a 2-layer board can be made to work, with one
layer dedicated completely to ground, and the other to power and
signal distribution. A great deal of attention to component layout
and interconnect routing is required for this approach.
LOGIC INTERFACE
The logic input of the 1626 is designed to accept standard DC-
coupled 5 volt logic swings, with no speed-up capacitors re-
quired. If the input signal voltage exceeds 6 volts, the input pin
must be protected against the excessive voltage in the HIGH
state. Either a high speed blocking diode must be used, or a
resistive divider to attenuate the logic swing is necessary.
LAYOUT FOR HIGH SPEED
The SG1626 can generate relatively large voltage excursions
with rise and fall times around 20-30 nanoseconds with light
capacitive loads. A Fourier analysis of these time domain signals
will indicate strong energy components at frequencies much
higher than the basic switching frequency. These high frequen-
cies can induce ringing on an otherwise ideal pulse if sufficient
inductance occurs in the signal path (either the positive signal
trace or the ground return). Overshoot on the rising edge is
undesirable because the excess drive voltage could rupture the
gate oxide of a power MOSFET. Trailing edge undershoot is
dangerous because the negative voltage excursion can forward-
bias the parasitic PN substrate diode of the driver, potentially
causing erratic operation or outright failure.
Ringing can be reduced or eliminated by minimizing signal path
inductance, and by using a damping resistor between the drive
output and the capacitive load. Inductance can be reduced by
keeping trace lengths short, trace widths wide, and by using 2oz.
copper if possible. The resistor value for critical damping can be
calculated from:
R
D
= 2√L/C
L
[2]
where L is the total signal line inductance, and C
L
is the load
capacitance. Values between 10 and 100ohms are usually
sufficient. Inexpensive carbon composition resistors are best
because they have excellent high frequency characteristics.
They should be located as close as possible to the gate terminal
of the power MOSFET.
5
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