FUNCTIONAL BLOCK DIAGRAM (Package type : 80P6Q-A)
Main Clock Main Clock
Output X
OUT
Input X
IN
(0V)
V
SS
30
25
71
Reset Input
RESET
(5V)
V
CC
X
COUT
RTP
0
,RTP
1
P5(8)
P4(8)
X
CIN
Real time port function
φ
ADT
INT
2
,INT
3
INT
0
,INT
1
26 27
1
2
3 4
5
6
7
8
72 73
9 10 11 12 13 14 15 16
17 18 19 20 21 22 23 24
55 56 57 58
Key on wake up
Fig. 3 Functional block diagram
Data bus
C P U
A
ROM
X
Y
S
PC
H
PC
L
Timer X(16)
Timer Y(16)
Timer 1(8)
Timer 3(8)
Timer 2(8)
PS
LCD display
RAM
(16 bytes)
RAM
80
79
78
77
28
29
Clock generating
circuit
V
L 1
V
L 2
V
L 3
76
X
CIN
X
COUT
φ
Sub-Clock Sub-Clock
Input
Output
LCD
drive control
circuit
COM
0
COM
1
75
COM
2
74
COM
3
70
69
68
67
66
65
64
63
62
61
60
59
SEG
0
SEG
1
SEG
2
SEG
3
SEG
4
SEG
5
SEG
6
SEG
7
SEG
8
SEG
9
SEG
10
SEG
11
A-D
converter(8)
SI/O(8)
T
OUT
CNTR
0
,CNTR
1
P7(2)
P6(8)
P3(4)
P2(8)
P1(8)
P0(8)
31 32 33 34 35 36 37 38
39 40 41 42 43 44 45 46
47 48 49 50 51 52 53 54
I/O Port P7
I/O Port P6
I/O Port P5
V
REF
AV
SS
(0V)
I/O Port P4
Input Port P3
I/O Port P2
I/O Port P1
I/O Port P0
MITSUBISHI MICROCOMPUTERS
SINGLE-CHIP 8-BIT CMOS MICROCOMPUTER
3822 Group
3
MITSUBISHI [ MITSUBISHI ELECTRIC SEMICONDUCTOR ]
