欢迎访问ic37.com |
会员登录 免费注册
发布采购

MC145572PB 参数 Datasheet PDF下载

MC145572PB图片预览
型号: MC145572PB
PDF下载: 下载PDF文件 查看货源
内容描述: 低电压CMOS八路缓冲器 [LOW-VOLTAGE CMOS OCTAL BUFFER]
分类和应用: 电信集成电路综合业务数字网
文件页数/大小: 8 页 / 158 K
品牌: MOTOROLA [ MOTOROLA, INC ]
 浏览型号MC145572PB的Datasheet PDF文件第2页浏览型号MC145572PB的Datasheet PDF文件第3页浏览型号MC145572PB的Datasheet PDF文件第4页浏览型号MC145572PB的Datasheet PDF文件第5页浏览型号MC145572PB的Datasheet PDF文件第6页浏览型号MC145572PB的Datasheet PDF文件第7页浏览型号MC145572PB的Datasheet PDF文件第8页  
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low-Voltage CMOS
Octal Buffer
With 5V-Tolerant Inputs and Outputs
(3-State, Inverting)
The MC74LCX240 is a high performance, inverting octal buffer
operating from a 2.7 to 3.6V supply. High impedance TTL compatible
inputs significantly reduce current loading to input drivers while TTL
compatible outputs offer improved switching noise performance. A VI
specification of 5.5V allows MC74LCX240 inputs to be safely driven from
5V devices. The MC74LCX240 is suitable for memory address driving
and all TTL level bus oriented transceiver applications.
Current drive capability is 24mA at the outputs. The Output Enable
(OE) input, when HIGH, disables the outputs by placing them in a HIGH Z
condition.
MC74LCX240
LOW–VOLTAGE CMOS
OCTAL BUFFER
20
Designed for 2.7 to 3.6V VCC Operation
5V Tolerant — Interface Capability With 5V TTL Logic
Supports Live Insertion and Withdrawal
IOFF Specification Guarantees High Impedance When VCC = 0V
LVTTL Compatible
LVCMOS Compatible
24mA Balanced Output Sink and Source Capability
Near Zero Static Supply Current in All Three Logic States (10µA)
Substantially Reduces System Power Requirements
20
1
1
DW SUFFIX
PLASTIC SOIC
CASE 751D–04
20
1
M SUFFIX
PLASTIC SOIC EIAJ
CASE 967–01
Latchup Performance Exceeds 500mA
ESD Performance: Human Body Model >2000V; Machine Model >200V
SD SUFFIX
PLASTIC SSOP
CASE 940C–03
20
Pinout: 20–Lead
(Top View)
VCC
20
2OE
19
1O0
18
2D0
17
1O1
16
2D1
15
1O2
14
2D2
13
1O3
12
2D3
11
1
DT SUFFIX
PLASTIC TSSOP
CASE 948E–02
PIN NAMES
Pins
nOE
1Dn, 2Dn
1On, 2On
Function
Output Enable Inputs
Data Inputs
3–State Outputs
1
1OE
2
1D0
3
2O0
4
1D1
5
2O1
6
1D2
7
2O2
8
1D3
9
2O3
10
GND
9/95
©
Motorola, Inc. 1996
1
REV 3