Device User Guide — 9S12E128DGV1/D V01.04
Freescale Semiconductor, Inc.
Section 4 Modes of Operation
4.1 Overview
Eight possible modes determine the operating configuration of the MC9S12E-Family. Each mode has an
associated default memory map and external bus configuration controlled by a further pin.
Three low power modes exist for the device.
4.2 Chip Configuration Summary
Freescale Semiconductor, Inc...
The operating mode out of reset is determined by the states of the MODC, MODB, and MODA pins during
reset. The MODC, MODB, and MODA bits in the MODE register show the current operating mode and
provide limited mode switching during operation. The states of the MODC, MODB, and MODA pins are
latched into these bits on the rising edge of the reset signal. The ROMCTL signal allows the setting of the
ROMON bit in the MISC register thus controlling whether the internal Flash is visible in the memory map.
ROMON = 1 mean the Flash is visible in the memory map. The state of the ROMCTL pin is latched into
the ROMON bit in the MISC register on the rising edge of the reset signal.
Table 4-1 Mode Selection
BKGD =
MODC
0
0
0
0
1
1
1
1
PE6 =
MODB
0
0
1
1
0
0
1
1
PE5 =
MODA
0
1
0
1
0
1
0
1
PK7 =
ROMCTL
X
0
1
X
0
1
X
0
1
X
0
1
ROMON
Bit
1
1
0
0
1
0
1
0
1
1
0
1
Mode Description
Special Single Chip, BDM allowed and ACTIVE. BDM is
allowed in all other modes but a serial command is
required to make BDM active.
Emulation Expanded Narrow, BDM allowed
Special Test (Expanded Wide), BDM allowed
Emulation Expanded Wide, BDM allowed
Normal Single Chip, BDM allowed
Normal Expanded Narrow, BDM allowed
Peripheral; BDM allowed but bus operations would cause
bus conflicts (must not be used)
Normal Expanded Wide, BDM allowed
For further explanation on the modes refer to the HCS12 MEBI Block Guide.
Table 4-2 Clock Selection Based on PE7
PE7 = XCLKS
1
0
Description
Colpitts Oscillator selected
Pierce Oscillator/external clock selected
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