MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Order this document
by MCM6341/D
Advance Information
MCM6341
128K x 24 Bit Static Random
Access Memory
The MCM6341 is a 3,145,728–bit static random access memory organized as
131,072 words of 24 bits. Static design eliminates the need for external clocks
or timing strobes.
The MCM6341 is equipped with chip enable (E1, E2, E3) and output enable
(G) pins, allowing for greater system flexibility and eliminating bus contention
problems.
The MCM6341 is available in a 119–bump PBGA package.
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Single 3.3 V
±
10% Power Supply
Fast Access Time: 10/11/12/15 ns
Equal Address and Chip Enable Access Time
All Inputs and Outputs are TTL Compatible
Three–State Outputs
Power Operation: 280/275/270/260 mA Maximum, Active AC
Commercial Temperature (0°C to 70°C) and
Industrial Temperature (– 40°C to + 85°C) Options
BLOCK DIAGRAM
A
A
A
A
A
A
A
A
A
ROW
DECODER
ZP PACKAGE
PBGA
CASE 999–02
PIN NAMES
A . . . . . . . . . . . . . . . . . . . . . . Address Inputs
W . . . . . . . . . . . . . . . . . . . . . . . Write Enable
G . . . . . . . . . . . . . . . . . . . . . Output Enable
E1, E2, E3 . . . . . . . . . . . . . . . . Chip Enable
DQ . . . . . . . . . . . . . . . . . Data Input/Output
NC . . . . . . . . . . . . . . . . . . . . No Connection
VDD . . . . . . . . . . . . . + 3.3 V Power Supply
VSS . . . . . . . . . . . . . . . . . . . . . . . . . Ground
MEMORY MATRIX
DQ
INPUT
DATA
CONTROL
DQ
A
E1
E2
E3
W
G
A
A
COLUMN I/O
COLUMN DECODER
A
A
A
A
A
DQ
DQ
This document contains information on a new product. Specifications and information herein are subject to change without notice.
REV 2
2/18/98
©
Motorola, Inc. 1998
MOTOROLA FAST SRAM
MCM6341
1
MOTOROLA [ MOTOROLA, INC ]
