Freescale Semiconductor, Inc.
Advance Information — 68HC(9)12D60
List of Tables
Table
1-1
1-2
2-1
2-2
3-1
3-2
3-3
3-4
4-1
5-1
5-2
5-3
5-4
7-1
8-1
8-2
9-1
9-2
12-1
12-2
12-3
12-4
12-5
13-1
13-2
13-3
14-1
14-2
14-3
Title
Page
Device Ordering Information. . . . . . . . . . . . . . . . . . . . . . . . . . . 27
68HC(9)12D60 Development Tools Ordering Information . . . .28
M68HC12 Addressing Mode Summary . . . . . . . . . . . . . . . . . .34
Summary of Indexed Operations . . . . . . . . . . . . . . . . . . . . . . . 35
68HC(9)12D60 Power and Ground Connection Summary. . . . 44
68HC(9)12D60 Signal Description Summary . . . . . . . . . . . . . . 51
68HC(9)12D60 Port Description Summary. . . . . . . . . . . . . . . .60
Port Pull-Up, Pull-Down and Reduced Drive Summary . . . . . .61
68HC(9)12D60 Register Map . . . . . . . . . . . . . . . . . . . . . . . . . . 64
Mode Selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .74
Mapping Precedence . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .80
RFSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . .85
EXSTR Stretch Bit Definition . . . . . . . . . . . . . . . . . . . . . . . . . .85
Effects of ENPE, LAT and ERAS on Array Reads . . . . . . . . . 105
1K byte EEPROM Block Protection . . . . . . . . . . . . . . . . . . . . 120
Erase Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .121
Interrupt Vector Map . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 126
Stacking Order on Entry to Interrupts . . . . . . . . . . . . . . . . . . . 132
Summary of STOP Mode Exit Conditions. . . . . . . . . . . . . . . .161
Summary of Pseudo STOP Mode Exit Conditions . . . . . . . . .161
Clock Monitor Time-Outs . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
Real Time Interrupt Rates. . . . . . . . . . . . . . . . . . . . . . . . . . . .175
COP Watchdog Rates . . . . . . . . . . . . . . . . . . . . . . . . . . . . . .178
Clock A and Clock B Prescaler. . . . . . . . . . . . . . . . . . . . . . . . 186
PWM Left-Aligned Boundary Conditions . . . . . . . . . . . . . . . . 196
PWM Center-Aligned Boundary Conditions . . . . . . . . . . . . . . 196
Compare Result Output Action . . . . . . . . . . . . . . . . . . . . . . . . 212
Edge Detector Circuit Configuration . . . . . . . . . . . . . . . . . . . .212
Prescaler Selection. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 214
Freescale Semiconductor, Inc...
68HC(9)12D60 — Rev 4.0
MOTOROLA
Advance Information
List of Tables
For More Information On This Product,
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15
MOTOROLA [ MOTOROLA, INC ]
