Freescale Semiconductor, Inc.
Advance Information — 68HC(9)12D60
Glossary
A
— See “accumulators (A and B or D).”
accumulators (A and B or D)
— Two 8-bit (A and B) or one 16-bit (D) general-purpose registers
in the CPU. The CPU uses the accumulators to hold operands and results of arithmetic
and logic operations.
acquisition mode
— A mode of PLL operation with large loop bandwidth. Also see ’tracking
mode’.
address bus
— The set of wires that the CPU or DMA uses to read and write memory locations.
addressing mode
— The way that the CPU determines the operand address for an instruction.
The M68HC12 CPU has 15 addressing modes.
ALU
— See “arithmetic logic unit (ALU).”
analogue-to-digital converter (ATD)
— The ATD module is an 8-channel, multiplexed-input
successive-approximation analog-to-digital converter.
arithmetic logic unit (ALU)
— The portion of the CPU that contains the logic circuitry to perform
arithmetic, logic, and manipulation operations on operands.
asynchronous
— Refers to logic circuits and operations that are not synchronized by a common
reference signal.
ATD
— See “analogue-to-digital converter”.
B
— See “accumulators (A and B or D).”
baud rate
— The total number of bits transmitted per unit of time.
BCD
— See “binary-coded decimal (BCD).”
binary
— Relating to the base 2 number system.
binary number system
— The base 2 number system, having two digits, 0 and 1. Binary
arithmetic is convenient in digital circuit design because digital circuits have two
permissible voltage levels, low and high. The binary digits 0 and 1 can be interpreted to
correspond to the two digital voltage levels.
Freescale Semiconductor, Inc...
68HC(9)12D60 — Rev 4.0
MOTOROLA
Glossary
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