Logic Diagrams
151A
Address Buffers for
54151A 74151A
TL F 6546 – 5
TL F 6546 – 4
See Address Buffers Below
Function Tables
54150 74150
Inputs
Select
D
X
L
L
L
L
L
L
L
L
H
H
H
H
H
H
H
H
E0 E1
54151A 75151A
Inputs
Outputs
Strobe
S
H
L
L
L
L
L
L
L
L
Y
L
D0
D1
D2
D3
D4
D5
D6
D7
W
H
D0
D1
D2
D3
D4
D5
D6
D7
C
X
L
L
L
L
H
H
H
H
L
L
L
L
H
H
H
H
B
X
L
L
H
H
L
L
H
H
L
L
H
H
L
L
H
H
A
X
L
H
L
H
L
H
L
H
L
H
L
H
L
H
L
H
Strobe
S
H
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
L
Outputs
W
C
H
E0
E1
E2
E3
E4
E5
E6
E7
E8
E9
E10
E11
E12
E13
E14
E15
X
L
L
L
L
H
H
H
H
D0 D1
Select
B
X
L
L
H
H
L
L
H
H
A
X
L
H
L
H
L
H
L
H
H
e
High Level L
e
Low Level X
e
Don’t Care
D7
e
the level of the respective D input
H
e
High Level L
e
Low Level X
e
Don’t Care
E15
e
the complement of the level of the respective E input
6
NSC [ NATIONAL SEMICONDUCTOR ]
