CD4013BM CD4013BC Dual D Flip-Flop
February 1988
CD4013BM CD4013BC Dual D Flip-Flop
General Description
The CD4013B dual D flip-flop is a monolithic complementa-
ry MOS (CMOS) integrated circuit constructed with N- and
P-channel enhancement mode transistors Each flip-flop
has independent data set reset and clock inputs and ‘‘Q’’
and ‘‘Q’’ outputs These devices can be used for shift regis-
ter applications and by connecting ‘‘Q’’ output to the data
input for counter and toggle applications The logic level
present at the ‘‘D’’ input is transferred to the Q output during
the positive-going transition of the clock pulse Setting or
resetting is independent of the clock and is accomplished
by a high level on the set or reset line respectively
Features
Y
Y
Y
Wide supply voltage range
High noise immunity
Low power TTL
compatibility
3 0V to 15V
0 45 V
DD
(typ )
fan out of 2 driving 74L
or 1 driving 74LS
Applications
Y
Y
Y
Y
Automotive
Data terminals
Instrumentation
Medical electronics
Y
Y
Y
Y
Alarm system
Industrial electronics
Remote metering
Computers
Connection Diagram
Dual-In-Line Package
Order Number CD4013B
TL F 5946 – 1
Top View
Truth Table
CL
L
L
K
x
x
x
D
0
1
x
x
x
x
R
0
0
0
1
0
1
S
0
0
0
0
1
1
Q
0
1
Q
0
1
1
Q
1
0
Q
1
0
1
No change
e
Level change
x
e
Don’t care case
C
1995 National Semiconductor Corporation
TL F 5946
RRD-B30M105 Printed in U S A
NSC [ NATIONAL SEMICONDUCTOR ]
