DAC0830/DAC0832
Definition of Package Pinouts
Control Signals
(All control signals level actuated)
CS:
Chip Select
(active low). The CS in combination
with ILE will enable WR
1
.
ILE:
WR
1
:
Input Latch Enable
(active high). The ILE in com-
bination with CS enables WR
1
.
Write 1.
The active low WR
1
is used to load the
digital input data bits (DI) into the input latch. The
data in the input latch is latched when WR
1
is high.
To update the input latch–CS and WR
1
must be low
while ILE is high.
Write 2
(active low). This signal, in combination with
XFER, causes the 8-bit data which is available in the
input latch to transfer to the DAC register.
V
REF
:
resistor for the external op amp which is used to
provide an output voltage for the DAC. This on-chip
resistor should always be used (not an external
resistor) since it matches the resistors which are
used in the on-chip R-2R ladder and tracks these
resistors over temperature.
Reference Voltage Input.
This input connects an
external precision voltage source to the internal
R-2R ladder. V
REF
can be selected over the range
of +10 to −10V. This is also the analog voltage input
for a 4-quadrant multiplying DAC application.
Digital Supply Voltage.
This is the power supply
pin for the part. V
CC
can be from +5 to +15V
DC
.
Operation is optimum for +15V
DC
The pin 10 voltage must be at the same ground
potential as I
OUT1
and I
OUT2
for current switching
applications. Any difference of potential (V
OS
pin
10) will result in a linearity change of
WR
2
:
V
CC
:
XFER: Transfer control signal
(active low). The XFER will
enable WR
2
.
Other Pin Functions
DI
0
-DI
7
: Digital Inputs.
DI
0
is the least significant bit (LSB)
and DI
7
is the most significant bit (MSB).
I
OUT1
: DAC Current Output 1.
I
OUT1
is a maximum for a
digital code of all 1’s in the DAC register, and is
zero for all 0’s in DAC register.
I
OUT2
: DAC Current Output 2.
I
OUT2
is a constant minus
I
OUT1
, or I
OUT1
+ I
OUT2
= constant (I full scale for a
fixed reference voltage).
R
fb
:
Feedback Resistor.
The feedback resistor is pro-
vided on the IC chip for use as the shunt feedback
GND:
For example, if V
REF
= 10V and pin 10 is 9mV offset from
I
OUT1
and I
OUT2
the linearity change will be 0.03%.
Pin 3 can be offset
±
100mV with no linearity change, but the
logic input threshold will shift.
Linearity Error
00560823
00560824
a) End point test afterzero and fs
adj.
b) Best straight line
00560825
c) Shifting fs adj. to pass
best straight line test
Definition of Terms
Resolution:
Resolution is directly related to the number of
switches or bits within the DAC. For example, the DAC0830
has 2
8
or 256 steps and therefore has 8-bit resolution.
Linearity Error:
Linearity Error is the maximum deviation
from a
straight line passing through the endpoints of the
DAC transfer characteristic.
It is measured after adjusting for
zero and full-scale. Linearity error is a parameter intrinsic to
the device and cannot be externally adjusted.
National’s linearity “end point test” (a) and the “best straight
line” test (b,c) used by other suppliers are illustrated above.
The “end point test’’ greatly simplifies the adjustment proce-
dure by eliminating the need for multiple iterations of check-
ing the linearity and then adjusting full scale until the linearity
is met. The “end point test’’ guarantees that linearity is met
7
after a single full scale adjust. (One adjustment vs. multiple
iterations of the adjustment.) The “end point test’’ uses a
standard zero and F.S. adjustment procedure and is a much
more stringent test for DAC linearity.
Power Supply Sensitivity:
Power supply sensitivity is a
measure of the effect of power supply changes on the DAC
full-scale output.
Settling Time:
Settling time is the time required from a code
transition until the DAC output reaches within
±
1
⁄
2
LSB of the
final output value. Full-scale settling time requires a zero to
full-scale or full-scale to zero output change.
Full Scale Error:
Full scale error is a measure of the output
error between an ideal DAC and the actual device output.
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