LM93
16.0 Registers
(Continued)
16.8.2 Register BDh Special Function Control 2 (Smart Tach Mode Enable and Fan Control Temperature Resolution
Control)
Register
Address
BDh
Read/
Write
R/W
Register
Name
Special Function
Control 2
Bit
0
1
2
3
4
5
6
7
Name
STE1
STE2
STE3
STE4
ZN12_RS
ZN34_RS
RES
RES
Bit 7
RES
Bit 6
RES
Bit 5
ZN34
_RS
Bit 4
ZN12
_RS
Bit 3
STE4
Bit 2
STE3
Bit 1
STE2
Bit 0
STE1
Default
Value
00h
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R
R
Description
Enable Smart Tach for Tach 1
Enable Smart Tach for Tach 2
Enable Smart Tach for Tach 3
Enable Smart Tach for Tach 4
When this bit is set, the auto fan control will use
0.5˚C of resolution for zones 1 and 2
When this bit is set, the auto fan control will use
0.5˚C of resolution for zones 3 and 4
Reserved
Reserved
Application Note:
Enabling Smart Tach mode is not supported while either PWM output is configured for 22.5 kHz. The behavior
of the part is undefined if this configuration is programmed. Register E0h Special Function TACH to PWM Binding must be setup
when Smart Tach modes are enabled.
16.8.3 Register BEh
Register
Address
BEh
Read/
Write
R/W
GPI/VID Level Control
Register
Name
GPI/VID
Level Control
Name
P1_VID_LVL
P2_VID_LVL
RES
GPI4_LVL
GPI5_LVL
GPI6_LVL
GPI7_LVL
Bit 7
GPI7
_LVL
R/W
R/W
R/W
R
R/W
R/W
R/W
R/W
Bit 6
GPI6
_LVL
Bit 5
GPI5
_LVL
Bit 4
GPI4
_LVL
Bit 3
Bit 2
Bit 1
P2_VID
_LVL
Bit 0
P1_VID
_LVL
Default
Value
00h
RES
Bit
0
1
3:2
4
5
6
7
Description
If set, P1_VIDx inputs use alternate lower V
IH
and V
IL
levels
If set, P2_VIDx inputs use alternate lower V
IH
and V
IL
levels
Reserved
If set, GPIO4 input use alternate lower V
IH
and V
IL
levels
If set, GPIO5 input use alternate lower V
IH
and V
IL
levels
If set, GPIO6 input use alternate lower V
IH
and V
IL
levels
If set, GPIO7 input use alternate lower V
IH
and V
IL
levels
See the DC Electrical Characteristics for exact V
IH
and V
IL
levels.
63
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